Schweitzer Engineering Laboratories, Inc.

Paul Stoaks

Colin Gordon

Dennis Gammel

Timothy Joseph Watkins

Lisa Gayle Nelms

Duane C Skelton

Dean G Stevens

An intelligent electronic device (IED) includes memory and a processor operatively coupled to the memory. The processor is configured to establish, over a communication network of a power system, a communication link according to a media access control security (MACsec) Key Agreement (MKA). The TED receives a plurality of access control secure association keys (SAKs) via the communication link. The TED receives one or more checked-out SAKs indicating a request to access the TED The TED allows access based on the one or more checked-out access control SAKs matching at least one of the plurality of access control SAKs.

Authentication of intelligent electronic devices (IEDs) using secure association keys (SAKs)

A key server device obtains authorization information of a user associated with an intelligent electronic device (IED). The key server communicates the authorization information to the IED, via a Media Access Control Security (MACsec) Key Agreement (MKA) protocol to allow the IED to authenticate the user. The key server receives one or more commands from the user. The key server communicates the one or more commands to the IED to allow the IED to perform operations based on the one or more commands.

Secure transfer using media access control security (MACsec) key agreement (MKA)

Systems, devices, and methods include protective functions in an electrical power system. For example, a processing subsystem may include a first processor and a second processor. The first processor and the second processor may operate independently. A memory subsystem may comprise a first memory section and a second memory section. A memory management subsystem may enable memory access between the first processor and the first memory section and disable memory access between the first processor and the second memory section. The memory management subsystem may further enable memory access between the second processor and the second memory section and disable memory access between the second processor and the first memory section. A protection subsystem may include the first processor and the first memory section and enable a protection function. The second processor and the second memory section may provide a second function that operates independently of the protection function.

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Moscow, ID, United States of America

Paul Stoaks