Lucent Technologies Inc.

Agere Systems Inc.

Paul Stephan Bedrosian

David C Wojewoda

Harold Allan Simpson

James L Brandner

A packet delay variation simulation system has a packet generator, a packet delay variation generator, and a packet delay analyzer to analyze delayed packets. The packet delay variation generator has multiple delay distribution modules that use both a deterministic delay process and a statistical delay process packet for determining a packet's delay. The packet delay variation generator may utilize different probability density functions to describe various portions of measured packet data. That is, measured packet delay information is analyzed and information from this analysis is used to construct a total delay model for a network. The delay may include a pre-determined deterministic delay offset as well as one or more variable statistical delay offsets.

Method and apparatus for simulating packet delay variation of a multi-switch network

A method and system for analyzing simulated packet delay variation (PDV) using derivative PDV is disclosed. The delay-step method for simulating PDV determines a delay for each packet in a stream of packets generated at a regular interval. Delay target values are randomly selected based on a statistical distribution, such as a Gaussian distribution. Delay-steps are determined for each packet based on the delay target values. The delay-steps can be fixed or variable sized steps which are used to adjust the delay of sequential packets. PDV is generated by delaying each of the packets with the delay determined for that packet. The derivative PDV is calculated to evaluate a delay rate of change on a packet-by-packet basis. The derivative PDV can be used as a metric to specify stresses for adaptive packet timing recovery stress testing.

Derivative packet delay variation as a metric for packet timing recovery stress testing

A method and system for providing connectionless configurations for stress testing timing and synchronization in data packet networks. Packet traffic of interest is transmitted through multiple interconnected switching nodes such that different packets can be transmitted over different paths through the switching nodes. The nodes can support background traffic in order to generate delays for the packets at each of the switching nodes. By allowing packets to use multiple paths in a single testing configuration, a connectionless packet flow can be utilized for adaptive packet timing recovery stress testing.

Connectionless configurations for stress testing timing and synchronization in data packet networks

A method and system for simulating packet delay variation (PDV) is disclosed. The delay-step method for simulating PDV determines a delay for each packet is a stream of packets generated at a regular interval. Delay target values are randomly selected based on a statistical distribution, such as a Gamma distribution, which models a desired PDV. Delay-steps are determined for each packet based on the delay target values. The delay-steps can be fixed or variable sized steps which are used to adjust the delay of sequential packets. Each of the packets is then transmitted with the delay determined for that packet.

Simulating packet delay variation using step-target delay method

Embodiments of the present invention provide packet timing recovery stress testing by generating packet delay variation (PDV) with a uniformly distributed probability density function (PDF). A delay-step method determines a delay for each packet in a stream of packets generated at a regular interval. In the delay-step method, delay-steps are determined for each packet based on delay target values. To generate PDV with a uniform PDF, the delay target values are randomly selected based on a pre-biased PDF which is a uniform distribution that is pre-biased by a pre-bias function. The pre-bias function increases the values of small delay target values so that an increased number of delay target values are at the extremes of the uniform distribution, which causes the delay-step method to result in a PDV with a uniform distribution.

Method and system for generating packet delay variation with a uniform distribution

Timing information, such as stratumtraceable synchronization information, is transmitted in a high-bit-rate digital subscriber line (HDSL) transport frame by timing the transport frame using a corresponding timing reference signal. In an illustrative embodiment, a central office modem maps a DS1 payload at 1.544 Mbps into HDSL transport frames at 1.552 Mbps, using a DS1 timing reference signal generated by, e.g., a building integrated timing supply (BITS) having global positioning system (GPS) capability. The transport frame is transmitted by the central office modem to a customer premises modem which demaps the transport frames to recover the DS1 payload and the DS1 timing reference signal. The recovered timing reference signal is then delivered to an external timing input of a computer, set-top box or other customer premises equipment (CPE). Synchronization status messages (SSMs) may be included in the timing information transmitted between the central office and customer premises modems. The invention is applicable to DSL signals other than HDSL2, including, e.g., single-pair HDSL signals, multiple-pair HDSL signals, as well as other types of signals used in conjunction with the transport of information over existing wired connections.

Method and apparatus for synchronization of high-bit-rate digital subscriber line signals

A synchronization system in accordance with the principles of the invention includes a central synchronizing management unit, at least one synchronization distribution unit, and at least one network element. Each synchronization distribution unit receives synchronization and management information from the central synchronization management unit. This information may be transmitted directly from the central synchronization management unit, or it may be transmitted though another synchronization distribution unit in a group of a daisy-chained synchronization distribution units. The daisy-chained arrangement employs both active and passive optical paths. The central synchronizing management unit may query any synchronization distribution unit within the system to obtain performance statistics. Additionally, the central synchronizing management unit may detect faults within the system by setting performance monitoring thresholds and interrogating a synchronization distribution unit to determine whether a threshold has been exceeded. The synchronization distribution units are physically located in close proximity to the network elements they serve. Additionally, the management and synchronization information exchanged between the central synchronization unit and a synchronization distribution unit is carried over a bidirectional optical link.

Optical synchronization system

An enhanced synchronization status messaging capability for synchronous networks is provided in a messaging format that is compatible with existing synchronization messaging standards. Additional messages, which are based on the same predefined code words used in existing synchronous status messages, are differentially coded and carried in available, but unused message positions, in the existing messaging scheme. In one illustrative embodiment, a two part message format is used for carrying information between network elements and between a network element and a co-located BITS clock in-a synchronous network. A first part of the message format carries the traditional quality level information of synchronization references using the set of code words predefined in the applicable standards. For example, the quality information of a synchronization reference is conveyed using 7 out of 10 &ldquo;like&rdquo; messages selected from the group of predefined code words set forth in the standards. The second part of the message format carries one or more enhanced messages that are conveyed using the same group of predefined code words, but which are differentially coded into message positions that are available and unused in the existing standards-compliant messaging schemes. For example, additional information can be conveyed in the remaining unused 3 out of 10 messages. By differentially coding the enhanced messages relative to the standard message part, the enhanced messages will always have separately identifiable code words even if the quality level designation of a reference conveyed by the 7 out of 10 &ldquo;like&rdquo; messages changes during a network reconfiguration.

Enhanced synchronization status messaging

An electromagnetic interference (EMI) shielding system includes one or more electrically conductive gaskets placed between electronic circuit cards in a card rack. The conductive gaskets are affixed to circuit cards to form a conductive shield, at the end of the card rack that is nearest the door of the cabinet in which the card racks are mounted. A gasket is attached to each circuit card within a rack, the gasket &ldquo;filling&rdquo; the space between the faceplates of two adjacent circuit cards.

Apparatus and method for electromagnetic shielding

A system for transmitting data signals across a data transmission line in accord with a specified digital data transport protocol utilizes a powering shelf for powering the line. To that end, the line electrically couples the powering shelf with a signal converter that converts the data signals to optical signals. The signal converter includes a first interface for receiving a first data signal complying with the protocol from the line, and a housing. The powering shelf, which is external to the converter housing, preferably includes a first powering circuit for the first interface.

Line powering shelf for data transmission line

Real time switch overs from one set of timing signals to a redundant set of timing signals in an ATM system, as required by periodic maintenance checks, are accomplished without incurring data errors by this apparatus and method. Each switch over apparatus has a phase locked loop with a controlled control loop which assists the phase locked loop in rapidly achieving nearly perfect phase locks to one of multiple system reference clocks. The characteristics of the special phased locked loop provide the stability and the timing functions necessary for switch overs between reference clocks to produce errorless ATM signal handling.

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Andover, MA, United States of America

Paul Stephan Bedrosian