Nxp B.v.

Nxp Usa, Inc.

Paul Southworth

Jeroen Johannes Maria Zaal

Scott M Hayes

Zhiwei Gong

Antonius Hendrikus Jozef Kamphuis

Dwight Lee Daniels

Yufu Liu

Amar Ashok Mavinkurve

Marcellinus Johannes Maria Geurts

Cheong Chiang Ng

Johannes Henricus Johanna Janssen

Namrata Kanth

Keith Richard Sarault

An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.

Patterned and planarized under-bump metallization

Embodiments are provided for package semiconductor devices, each device including: a low stress pad structure comprising: a dielectric layer, a seed layer having: a center section, and a ring section formed around the center section and over a top surface of the dielectric layer, wherein the ring section of the seed layer includes a set of elongated openings through which a portion of the top surface of the dielectric layer is exposed, and a metal layer having: an inner section formed over a top surface of the center section of the seed layer, and an outer section formed over a top surface of the ring section of the seed layer, wherein a bottom surface of the outer section of the metal layer directly contacts the portion of the top surface of the dielectric layer exposed through the set of elongated openings.

Low stress pad structure for packaged devices

Embodiments are provided for a multi-die packaged semiconductor device including: a panel of embedded dies including a plurality of radio frequency (RF) dies, wherein each RF die includes RF front-end circuitry, each RF die has an active side that includes a plurality of pads, each RF die has a back side exposed in a back side of the panel; a plurality of antenna connectors formed on a subset of the plurality of pads of each RF die; and an array of antennas formed over a front side of the panel and connected to the plurality of antenna connectors.

Multi-die and antenna array device

Growing community of inventors

Groesbeek, Netherlands

Paul Southworth