Analog Devices,inc.

Paul S Wilkins

Gil Engel

Sunder S Kidambi

Enrique Alvarez Fontecilla

Aspects of the present disclosure include receiving a digital input signal having an identified value, determining a number of a plurality of converters, determining, based on the identified value and the number, a minimum number of one or more minimum output configurations, parsing the digital input into a plurality of individual bits, and transmitting the plurality of individual bits to the plurality of converters based on an output configuration of the one or more minimum output configurations.

Apparatuses and methods for efficient shuffling in a digital to analog converter

Techniques that enable calibration of digital-to-analog Converters (DACs) with minimal processing overhead. A single frequency bin can be used to calibrate errors between bits. A low frequency feedback path can be included into a low frequency low power ADC to determine the error signal that exists in the calibration bin. The bits are calibrated when this error signal is minimized. The calibration techniques described provide an extremely efficient and optimal calibration at the DAC output of both static and dynamic errors.

Calibration of digital-to-analog converters

A packet detection technique is disclosed in which an average correlation signal is generated representative of the match between a repetitive sequence of symbols; an average power signal is generated representative of the average power in the sequence of symbols; a scaled magnitude of the average correlation signal scaled by a first predetermined scale factor is produced; and one of the average power signal and scaled magnitude of the average correlation signal are multiplied by the second scale factor and compared to determine whether there is a match between a repetitive sequence of symbols.

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Weston, MA, United States of America

Paul S Wilkins