University of Texas System

Paul S Ho

Tengfei Jiang

Ki-Don Lee

Ennis Takashi Ogawa

Hideki Matsuhashi

Salomon A Stavchansky

Zhuojie Wu

Junjun Liu

Ashish Rastogi

Phillip Bowman

Zhiquan Luo

Embodiments of the present disclosure include devices, and methods of making such devices, for delivery of one or more active agents with short or long zero-order release kinetics. Embodiments also include implantable or injectable drug delivery systems capable of controlled release over long periods of time for therapeutic agents.

Fabrication methods for nanodelivery systems for long term controlled delivery of active pharmaceutical ingredients

The present disclosure relates to a chip including a wafer, a back-end-of-line (BEOL) layer deposited on the wafer, a chip TSV in the wafer containing a conductive material, and a chip cap layer disposed between the chip TSV and the BEOL layer, and configured to reduce via extrusion of conductive material in the chip TSV during operation of the chip. The present disclosure further includes a 3D integrated circuit including a plurality of electrically connected chips, at least one of which is a chip as described above. The disclosure further relates to a 3D integrated circuit with an interposer, a TSV in the interposer containing a conductive material, and an interposer cap layer configured to reduce via extrusion of the conductive material located in the interposer TSV during operation of the circuit. The present disclosure further includes methods of forming such chips and 3D integrated circuits.

Capped through-silicon-vias for 3D integrated circuits

The disclosure relates to a method for forming a nanoscale structure by forming a pattern on a selectively etched layer located on top of a substrate using lithography, wherein the pattern results a gap having sidewalls, performing RIE on the gap having sidewalls, wherein RIE results in the formation of a self-aligned mask on the bottom wall of the gap with unprotected regions on the bottom wall of the gap near the junctions with the sidewalls, and wet etching the gap having a self-aligned mask and unprotected regions to remove the substrate under the unprotected regions to form a nanoscale structure in the substrate. The disclosure also relates to a nanoscale structure array including a plurality of nanotrenches, nanochannels or nanofins having a width of 50 nm or less and an average variation in width of 5% or less along the entire length of each nanotrench, nanochannel or nanofin.

Self-aligned masks and methods of use

A method of making an injectable or implantable active agent delivery device capable of delivering a diagnostic, therapeutic, and/or prophylactic agent to a desired targeted site having orifice(s) on the surface is disclosed herein providing unidirectional release of the agent at a controlled desirable rate. The agent may include, but is not limited to, drugs, proteins, peptides, biomarkers, bioanalytes, and/or genetic material. The technology of the invention is based on parallel processing to fabricate micro-holes on tubes employing photo-lithography and reactive ion etching techniques and also incorporates a simple molding method to form the micro-holes on flexible polymer tubes, including bio-degradable tubes. The parallel processing method of the instant invention is fast, economical and well suited for mass production. The developed device, due to its composite structure, has the ability to combine several release mechanisms, leading to zero-order release kinetics for most of the time.

Methods for making controlled delivery devices having zero order kinetics

Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.

Growing community of inventors

Austin, TX, United States of America

Paul S Ho