Taiwan Semiconductor Manufacturing Comp. Ltd.

Hewlett-packard Company

Paul Rousseau

Da-Wen Lin

Sheng-Jier Yang

Yvonne Lin

Peter Huang

Daniel Robuck

Some embodiments relate to a device disposed on a semiconductor substrate. The semiconductor substrate includes a base region and a crown structure extending upwardly from the base region. The crown structure is narrower than the base region. A plurality of fins extend upwardly from an upper surface of the crown structure. A gate dielectric material is disposed over upper surfaces and sidewalls of the plurality of the fins. A conductive electrode is disposed along sidewall portions of the gate dielectric material. An uppermost surface of the conductive electrode resides below the upper surfaces of the plurality of fins.

Two-transistor bandgap reference circuit and FinFET device suited for same

Some embodiments relate to a method. A semiconductor substrate is provided and has a base region and a crown structure extending upwardly from the base region. A plurality of fins are formed to extend upwardly from an upper surface of the crown structure. A gate dielectric material is formed over upper surfaces and sidewalls of the plurality of the fins. A conductive electrode material is formed over upper surfaces and sidewalls of the gate dielectric material. An etch is performed to etch back the conductive electrode material so upper surfaces of etched back conductive electrodes reside below the upper surfaces of the plurality of fins.

Some embodiments relate to a two transistor band gap reference circuit. A first transistor includes a first source, a first drain, a first body region separating the first source from the first drain, and a first gate. The first drain and first gate are coupled to a DC supply terminal. The second transistor includes a second source, a second drain, a second body region separating the second source from the second drain, and a second gate. The second gate is coupled to the DC supply terminal, and the second drain is coupled to the first source. Body bias circuitry is configured to apply a body bias voltage to at least one of the first and second body regions. Other embodiments relate to FinFET devices.

A document scanning system includes a preview sensor that is dedicated to document previewing and distinct from any other sensor that is involved in the document scanning process. The preview sensor is preferably a two-dimensional sensor array that captures the outline of an entire document in parallel. The captured document outline is previewed on a display device relative to an actual image area that is defined by the scanning system. In an enhanced embodiment of the scanning system, the preview sensor captures an image that is printed on the document in addition to the outline of the document, so that the image of the document is also previewed relative to the image area. Providing a dedicated preview sensor that captures document position and image data in parallel enables real-time display of a document relative to the image area.

Scanning system with document previewing

A document copy system includes a preview sensor that is dedicated to document previewing and distinct from any other sensor that is involved in the document copying process. The preview sensor is preferably a two-dimensional sensor array that captures the outline of an entire document in parallel. The captured document outline is previewed on a display device relative to an actual print area that is defined by the copy system. In an enhanced embodiment of the copy system, the preview sensor captures an image that is printed on the document in addition to the outline of the document, so that the image of the document is also previewed relative to the print area. Providing a dedicated preview sensor that captures document position and image data in parallel enables real-time display of a document relative to the print area.

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Sunnyvale, CA, United States of America

Paul Rousseau