Nvidia Corporation

Paul Racunas

Nirmal Raj Saxena

Steven James Heinrich

Naveen Cherukuri

Peter C Mills

Manan Patel

Liang Yin

Gentaro Hirota

Praveen Joginipally

Vaishali Kulkarni

Adam Hendrickson

David Charles Patrick

Sandeep Navada

Saurabh Hukerikar

Yiyang Feng

Abhijeet Ghadge

Various embodiments include a parallel processing computer system that detects memory errors as a memory client loads data from memory and disables the memory client from storing data to memory, thereby reducing the likelihood that the memory error propagates to other memory clients. The memory client initiates a stall sequence, while other memory clients continue to execute instructions and the memory continues to service memory load and store operations. When a memory error is detected, a specific bit pattern is stored in conjunction with the data associated with the memory error. When the data is copied from one memory to another memory, the specific bit pattern is also copied, in order to identify the data as having a memory error.

Error containment for enabling local checkpoint and recovery

Growing community of inventors

Landaff, NH, United States of America

Paul Racunas