Westinghouse Electric Corporation

Advantech Global, Ltd

Paul R Malmberg

Thomas Peter Brody

David L Green

Harvey C Nathanson

Dieter K Schroder

Joseph A Marcanio

Robert M Handy

Donald F Stoneburner

Nathan Bluzer

Zoltan K Kun

Arthur S Jensen

David J Stapleton

Terrance M Heng

A system and method for providing an active array of temperature sensing and cooling elements, including an active heatsink which further includes an active temperature sensing layer, a thermoelectric cooling layer, and a heatsink, which further includes a plurality of cooling channels. The temperature sensing element within the active temperature sensing layer includes a plurality of switching transistors, a linear transistor, a current sense resistor, a thermistor, a voltage sensing bus, a voltage setting bus, a current measurement bus, a measurement switching bus, a sense control bus, a storage capacitor, and a supply voltage, all under the control of a process control computer. The method of using an active array of temperature sensing and cooling elements includes the steps of aligning the shadow mask, depositing the material, detecting a thermal gradient, and controlling the thermoelectric cooling.

System for active array temperature sensing and cooling

A system and method for active array temperature sensing and cooling. The system includes an active temperature sensing layer, a thermoelectric cooling layer and a heatsink layer. The temperature sensing layer is formed of temperature sensing elements that sense the temperature gradient across an unevenly heated region of the active array substrate. The thermoelectric cooling layer controls the temperature gradient sensed by the temperature sensing layer. The heatsink layer includes a plurality of cooling channels for absorbing thermal energy from the unevenly heated region. The system is under the control of a process control computer.

System and method for active array temperature sensing and cooling

A vapor deposition shadow mask system includes a number of series connected vacuum vessels each having a material deposition source and shadow mask positioned therein. A substrate is translated along a path that has a longitudinal axis that extends through the vacuum vessels. Centers of shadow masks in first and second vacuum vessels are offset laterally on opposite sides of the longitudinal axis. The system is operative for depositing material on a second area of the substrate via the material deposition source and shadow mask in the second vacuum vessel in a manner that overlaps a portion of the material deposited on a first, adjacent area of the substrate via the material deposition source and shadow mask in the first vacuum vessel.

System for and method of manufacturing a large-area backplane by use of a small-area shadow mask

A brightness compensation system and method of providing brightness uniformity in an active-matrix organic light-emitting diode (OLED) flat-panel display. The brightness compensation system of the present invention includes a system controller, a timing generator, a test brightness generator, a pixel address generator, a video formatter, a first and second multiplexer, a memory device, a pixel adjust device, a level shifter and driver, a current sensor, an analog-to-digital converter, a DC power supply, and an active-matrix OLED display under test. The brightness compensation system and method of the present invention subjects an active-matrix OLED display to a testing operation that alternately tests every pixel, detects its output current, which is an indicator of light output level, for a given input voltage, saves the output current value in memory, then applies a corrective voltage to each pixel, so that each pixel has the same light output (output current) as its neighboring pixel.

System and method for compensation of active element variations in an active-matrix organic light-emitting diode (OLED) flat-panel display

An electronic device is formed from electronic elements deposited on a substrate. The electronic elements are deposited on the substrate by advancing the substrate through a plurality of deposition vacuum vessels, with each deposition vacuum vessel having at least one material deposition source and a shadowmask positioned therein. The material from at least one material deposition source positioned in each deposition vacuum vessel is deposited on the substrate through the shadowmask positioned in the deposition vacuum vessel to form on the substrate a circuit comprised of an array of electronic elements. The circuit is formed solely by the successive deposition of materials on the substrate.

Active matrix backplane for controlling controlled elements and method of manufacture thereof

The invention provides a thin film electroluminescent line array emitter structure which provides edge emissions which are typically 30 to 40 times brighter than the conventional face emissions. In an alternative embodiment, the emitter structure includes an integral capacitor in series with each emitter structure pixel. This integral thin film structure dielectric and phosphor composite layer serves both as the light-emitting layer for the edge-emitting device and as the dielectric for the capacitor.

Thin film electroluminescent line array emitter and printer

A charge-coupled device includes an insulation layer which is interfaced with a semiconductor wafer. Gating electrodes that are responsive to clocking signals are located on the surface of the insulation layer which is oppositely disposed from the interface with the semiconductor wafer such that the electric field produced by the potential on the electrodes has a substantial lateral component in the plane of the semiconductor-insulator interface. The lateral field component induced in the semiconductor wafer reduces the transfer time of charge carriers between adjacent electrodes thereby improving the transport response of the charge carriers to the clocking signals. A method for making the sloped oxide charge-coupled device is also described in which the insulation layer grown on a semiconductor is provided with sloped areas and the electrodes are evaporated onto these sloped areas to form the device's clocking structure.

Method of making a sloped insulator charge-coupled device

An acousto-electric device provides a memory for a reference signal and provides for the convolution or correlation of input signals with the reference signal. The reference signal is transduced onto a piezoelectric surface to establish an electric field which determines the transfer and recombination of minority carriers across the p-n junction matrix of an adjacent semiconductor thereby creating a space-charge region in the semiconductor which is a spatial replication of the reference signal. The signal may be recovered in relation to the amplitude modulation of a carrier signal. For correlation or convolution of the reference signal with input signals, the input signals are provided to first or second terminals respectively and transduced onto the piezoelectric surface to produce electric fields which interact with the space-charge region of the stored reference signal to provide a product current whose integration comprises the correlation or convolution output.

Acousto-electric signal convolver, correlator and memory

A method is provided for contactless testing of an integrated circuit by fabricating, integrally with the integrated circuit, at least one and preferably a plurality of conductive semiconductor elements that are electrically connected between power and/or signal sources and inputs to the integrated circuit, and that are adapted to electrically conduct when exposed to a radiation beam. The conductive elements are selectively exposed by at least one radiation beam, such as an electron or light beam, to cause the conductive elements to electrically conduct and supply desired electrical inputs at the connected inputs of the integrated circuits; and the electrical responses of at least a segment of the integrated circuit to said electrical input are measured to determine whether said circuit segment possesses specified electrical characteristics. The integrated circuit can thus be selectively and sequentially tested by segments and modules. After testing, the conductive semiconductor elements are preferably disconnected from the integrated circuit, and the integrated circuit selectively connected electrically while accommodating and passivating defective components and modules of the circuit.

Contactless test method for integrated circuits

A method and apparatus for digitally addressing an electron beam to select and then scan one of a plurality of spaced apart analog recordings of spoken words on a target. An electron gun at one end of a return beam vidicon tube provides the electron beam to scan the target positioned at the other end of the tube. The target is a wafer of semiconductive material with an oxide layer facing the electron gun. Variable width openings are etched into the oxide layer such that the edges of the openings define analog recordings. A first electron beam deflection control rapidly directs the beam in the 'Y' direction along the ends of the tracks to provide a track count for producing a track access signal by a digitally addressed downcounter. A second electron beam deflection control produces a scanning of the selected track in the 'X' direction while the electron beam oscillates at a dither frequency in the 'Y' direction to scan the width of the track. Control of the electron beam in the 'Z' direction provides a beam blanking during standby mode and provides intensity modulation to improve track acquisition performance and allow variable volume emphasis during the scan mode. The scanning rate in the 'X' direction is controlled to produce different word inflections or enunciation rates. A scan signal threshold detector senses the end of a word to enable compiling of a sentence with variable length words.

Random-access spoken word electron beam digitally addressable memory

A method is provided for contactless testing of an integrated circuit by fabricating, integrally with the integrated circuit, semiconductor switch elements, that is, thyristors, transistors and combinations thereof, that are connected to power and/or signal electrical inputs of the integrated circuit. Base regions of the switch elements are selectively exposed to a fine-dimensioned electron beam to switch the elements and supply desired electrical inputs at the connected inputs of the integrated circuit. The integrated circuit can thus be selectively tested preferably by segments and modules. After testing, the switch elements are disconnected from the integrated circuit, and the integrated circuit selectively connected preferably while accommodating and passivating defective components and modules of the circuit.

Growing community of inventors

Pittsburgh, PA, United States of America

Paul R Malmberg