Compaq Computer Corporation, Inc.

Hewlett-packard Development Company, L.p.

Other

Texas Instruments Corporation

Compaa Computer Corporation

Paul R Culley

Mark E Taylor

Alan L Goodrum

Jeffrey R Hilland

Kenneth A Jansen

Joseph P Miller

David A Miller

David J Garcia

Dale J Mayer

John A Landry

Javier F Izquierdo

Montgomery C McGraw

Kevin B Leigh

Siamak Tavallaei

Michael R Krause

Mallikarjun Chadalapaka

Andrew Brown

Kevin G Depew

John S Thayer

Dwight L Barron

Barry S Basile

Maria L Melo

Jens K Ramsey

Christopher C Wanner

Daniel Nathan Cripe

John M MacLaren

Karl N Walker

Raymond Y Chow

Timothy K Waldrop

Sompong Paul Olarig

Renato John Recio

Alan Frederic Benner

Arnold Thomas Schnell

Wade David Vinson

Gary W Thome

Michael P Moriarty

Roger E Tipley

Hung Q Le

Jeffrey S Autor

Jeff W Wolford

Steven J Wallace

Christopher J Pettey

Thomas D Rhodes

James H Nuckols

Lazaro D Perez

Clarence Y Mar

Elizabeth A Richard

Daniel Stuart Hull

Pamela M Cook

Gary L Brasher

Richard O Waldorf

Eric E Rose

James G Wendt

Guy E McSwain

Barry P Basile

In at least some embodiments, a system comprises a plurality of electrical devices and management logic coupled to the electrical devices. While the electrical devices are each in a pre-boot environment, the management logic obtains information from the electrical devices and uses the information to determine electrical compatibility of, and/or configure, the electrical devices.

Controller receiving a configuration command while receiving an auxiliary supply voltage

A computer-implemented method is used for determining cooling requirements of a computer system enclosure, where the enclosure includes a number of installed modules, the modules including fan modules. The method includes the steps of determining an individual impedance curve of each installed module; determining fan curves for the installed fan modules; based on the individual impedance curves, determining an overall system impedance curve for the computer system; determining desired performance requirements for the computer system; based on the desired performance requirements, determining corresponding fan curves; and choosing a fan curve that intersects the system impedance curve.

Method for determining cooling requirements of a computer system enclosure

Determining electrical compatibility and/or configuration of devices in a pre-boot environment

A system that comprises a first electronic device comprising a non-volatile memory. The system also comprises another electronic device in communication with the first electronic device and comprising a second non-volatile memory. The system further comprises a control logic coupled to the first and second electronic devices. Each of the non-volatile memories stores electrical characteristics associated with a corresponding electronic device. Prior to booting up the first or second electronic device, the control logic obtains and compares at least some of the electrical characteristics and disables the communication as a result of the comparison.

Comparing characteristics prior to booting devices

An apparatus employs a work request list to access a memory device. The apparatus comprises an upper layer protocol that generates the work request list comprising a plurality of work requests, the work request list having an attribute that indicates the number of the plurality of work requests in the work request list. The apparatus additionally comprises an interface that is adapted to receive the work request list and individually enqueue the plurality of work requests.

Method and apparatus for implementing work request lists

The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.

Method and apparatus for accessing a memory

The disclosed embodiments may relate to memory window access, which may include a memory window and protection domain associated with a process. The memory window access setting or bit may also allow a plurality of memory windows to be associated with a protection domain for a process. The memory window access setting or bit may allow access to the memory window to be for the queue pairs in a certain protection domain or a designated queue pair.

Memory window access mechanism

A system comprises a plurality of power supplies, a fan coupled to the power supplies, power management logic adapted to reconfigure the load to draw less power when a power supply fails and emergency logic. The emergency logic receives a status signal from each of the power supplies and, upon detecting a failure of a power supply, causes power to temporarily turn off to the fan while the power management logic reconfigures the load to draw less power.

Power management logic that reconfigures a load when a power supply fails

A distributed computer system includes a source endnode including a source process which produces message data and a send work queue having work queue elements that describe the message data for sending. A destination endnode includes a destination process and a receive work queue having work queue elements that describe where to place incoming message data. A communication fabric provides communication between the source endnode and the destination endnode. An end-to-end context is provided at the source endnode and the destination endnode storing state information to ensure the reception and sequencing of message data sent from the source endnode to the destination endnode permitting reliable datagram service between the source endnode and the destination endnode.

Reliable datagram transport service

The disclosed embodiments may relate to memory window access and may include a memory window and plurality of queue pairs associated with a process. Each of the plurality of queue pairs may be associated with a memory window context that may have queue pair information. The memory window may be associated with a memory window context that includes a protection information field. Accordingly, access to memory window may be allowed if the queue pair information matches the protection information field.

Binding a memory window to a queue pair

The disclosed embodiments relate to a queuing mechanism that may comprise a shared receive queue having a plurality of buffers. The queuing mechanism may also comprise a plurality of queue pairs, each of the plurality of queue pairs having a receive queue that comprises at least one of the plurality of buffers.

Shared receive queues

A processor-based system includes a processing unit. The processing unit includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. The processing unit is reset in response to a system reset signal being asserted at a reset input node and only selected portions of the processing unit are reset in response to a partial-reset signal being asserted at a partial-reset input node. The system can also include a number of other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.

Processor based system with system wide reset and partial system reset capabilities

A clock generation circuit is provided within an electronic computer system to adjust the phase of a clocking signal provided to various subsystems of the electronic system. A first phase-locked loop (PLL) is provided to establish multiple phases of a first reference clock. One of those phases is selected as a second reference clock, and a second PLL synchronizes the clocking signal to that second reference clock. Each subsystem and associated load which receives the clocking signal has a corresponding clock generation circuit comprising the second PLL. The second PLL for one subsystem can adjust the clocking signal phase prior to that subsystem receiving the clocking signal. The amount by which the second PLL adjusts phase on clocking signal may be different than that by which another, second PLL adjusts the clocking signal arriving on another subsystem. In all instances, however, the clocking signal arriving at the various subsystems are independently and variably changed to match the unique load characteristics of each subsystem using feedback of the clocking signal to the input of each respective second PLL.

Circuit and method employing feedback for driving a clocking signal to compensate for load-induced skew

A method for powering up a removable circuit card when it is inserted into a card slot of a computer system includes providing power and a clock signal to the circuit card. A communication link is electrically coupled to the circuit card after both the power and the clock signal are provided to the circuit card.

Removal and insertion of expansion cards in a computer system

A system management module (SMM) for a host server system includes a system management processor (SMP) connected to a system management local bus. The system management local bus connects to the system PCI bus through a system management central (SMC). The SMC includes the main arbitration unit for the PCI bus and also includes the arbiter for the system management local bus. The SMM includes a video controller and/or keyboard and mouse controller connected to the system management local bus to support remote consoling of the SMM. The video controller is further used for transmitting screen images to a remote computer system to facilitate system failure analysis. A plurality of system management remote units are provided for coupling to various components and busses within the host computer system. The system management remote units (SMR's) connect to the SMM via serial bus and permit the SMM to automatically monitor activities and operating conditions, including determining the source of interrupts on busses and detecting error conditions.

Computer diagnostic board that provides system monitoring and permits

Growing community of inventors

Cypress, TX, United States of America

Paul R Culley