Stmicroelectronics (research & Development) Limited

Stmicroelectronics Gmbh

Paul Pearson

Martin Bolton

Diarmuid Emslie

A system for processing packet streams includes a first packet queuing circuitry connected between a first processor and a second processor and operable to queue packets for transfer from the first processor to the second processor. The system includes a second packet queuing circuitry connected between the first processor and the second processor and operable to queue packets for transfer from the second processor to the first processor. The first processor is programmed to transfer secure packets to the second processor via the first queuing circuitry for security processing and the second processor is programmed to return the security-processed packets to the first processor via the second queuing circuitry.

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Bristol, United Kingdom

Paul Pearson