Infineon Technologies Ag

Siemens Aktiengesellschaft

Paul Nance

Ludwig Leipold

Wolfgang Werner

Jenoe Tihanyi

Peter Sommer

A method for generating a control signal after a predeterminable period of time is described. The method includes applying a voltage to an inductor at a beginning of a time measurement; and outputting, via a current threshold value detector, the control signal if a current through the inductor exceeds a predeterminable threshold value. The invention also relates to a timing circuit.

Method and timing circuit for generating a switching or control signal

A circuit configuration for driving an ignition coil includes a first semiconductor switch having a load path connected in series with a primary winding of the ignition coil, and having a control electrode, which is driven in accordance with a first drive signal. The circuit configuration further includes a second semiconductor switch having a load path connected in parallel with the primary winding and having a control electrode, which is driven in accordance with a second drive signal.

Circuit configuration for driving an ignition coil

A process for producing an epitaxial layer with laterally varying doping includes the following steps: (a) applying a patterned insulator layer to a semiconductor body; (b) growing a first epitaxial layer on the semiconductor body and the patterned insulator layer so that monocrystalline regions are formed over the semiconductor body and polycrystalline regions are formed over the patterned insulator layer, the angle of inclination (&agr;) of the interface between the monocrystalline regions and the polycrystalline regions depending on the grain size of the polycrystalline regions; (c) removing the polycrystalline regions and the insulator layer, and (d) growing a second epitaxial layer which, together with the monocrystalline regions of the first epitaxial layer, forms the epitaxial layer.

Process for producing an epitaxial layer with laterally varying doping

A method for fabricating direct wafer bond Si/SiO.sub.2 /Si substrates in which trenches are etched into a rear side of a device wafer. Subsequently, the rear side of the device wafer is ground. The device wafer is then placed by its front side onto the carrier wafer and the wafers are cross-linked to each other. The method has the advantage that a trench depth is no longer defined by an inaccurate etching process but rather by a thinning-back process that can be precisely controlled.

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Sunnyvale, CA, United States of America

Paul Nance