Texas Instruments Corporation

Paul Merle Emerson

Benjamin Stassen Cook

Barry Jon Male

Bryan E Bloodworth

Sandeep Shylaja Krishnan

Rajarshi Mukhopadhyay

Hong Jiang

Echere Iroaga

Ashish Manjrekar

Juan Alejandro Herbsommer

Marco Corsi

Peter Smeys

Steven Alfred Kummerl

Kurt Peter Wachtler

Ting-Ta Yen

Kenneth James Maggio

Scott Gary Sorenson

Django Trombley

Mohammad Hadi Motieian Najar

Ramlah Binte Abdul Razak

Glenn C Mayfield

James Nodar

A packaged integrated circuit (IC) includes a leadframe including a die pad. The packaged IC also includes a first circuit on the die pad, the first circuit having a region. The packaged IC also includes a second circuit on the first circuit, the second circuit being spaced from the region by a gap. The packaged IC also includes an attachment layer between the first and second circuits, the attachment layer and the first and second circuits enclosing at least a part of the gap over the region. The packaged IC also includes a mold compound encapsulating the first and second circuits, the attachment layer, and the at least part of the gap.

Semiconductor package with top circuit and an IC with a gap over the IC

In some examples, a device comprises a ceramic substrate having a cavity, a die pad in the cavity, and a semiconductor die in the cavity and having a first segment coupled to the die pad and a second segment cantilevered over a floor of the cavity. The device also includes a first conductive member in the cavity, the first conductive member coupled to a second conductive member exposed to an exterior of the ceramic substrate. The device also includes a bond wire coupled to a device side of the semiconductor die and to the first conductive member.

Cantilevered dies in ceramic packages

A packaged integrated circuit (IC) includes a leadframe including a die pad and leads around the die pad, an analog IC die having first bond pads on its active top side, and a second circuit including second circuit bond pads attached to the analog IC die by an attachment layer configured as a ring with a hollow center that provides an inner gap. A bottom side of the analog IC or the second circuit is attached to the die pad. Bond wires couple at least some of the first bond pads or some of the second circuit bond pads to the leads, and there is a second coupling between others of the second circuit bond pads and others of the first bond pads. A mold compound is for encapsulating the second circuit and the analog IC.

An integrated circuit includes a semiconductor substrate and a metallization structure over the semiconductor substrate. The metallization structure includes: a dielectric layer having a surface; a conductive routing structure; and an electronic circuit. Over the surface of the dielectric layer, a material is configured to set or adjust the electronic circuit.

Adjusting reactive components

An integrated circuit includes a lead frame, a first die, and a second die. The first die is bonded to and electrically connected to the lead frame. The second die is electrically connected to and spaced apart from the first die.

Integrated circuit package with partitioning based on environmental sensitivity

A first conductive routing structure is electrically connected to a first electronic component. A second conductive routing structure is electrically connected to a second electronic component. An additive deposition process deposits a material over a surface of a processed wafer to form a conductive or resistive structure, which extends from a portion of the first conductive routing structure to a portion of the second conductive routing structure, to configure a circuit including the first and second electronic components.

Additively manufactured programmable resistive jumpers

Electronic device manufacturing and configuration methods include performing an additive deposition process that deposits a conductive, resistive, magnetic, semiconductor and/or thermally conductive material over a surface of a processed wafer metallization structure to set or adjust a circuit of a capacitor, an inductor, a resistor, an antenna and/or a thermal component of the metallization structure.

Programming reactive components

Described examples include microelectronic devices and integrated circuits with an active first circuit in a first segment of a first wafer, a second circuit in a second segment of the first wafer, and second and third wafers bonded to different surfaces of the first wafer to provide first and second cavities with surfaces spaced from the first segment. An opening extends through the first wafer between the first and second cavities to separate portions of the first and second segments and to form a sealed cavity that surrounds the first segment. A bridge segment of the first wafer supports the first segment in the sealed cavity and includes one or more conductive structures to electrically connect the first and second circuits.

Thermal and stress isolation for precision circuit

A method forming packaged semiconductor devices includes providing a completed semiconductor package having a die with bond pads coupled to package pins. Sensor precursors including an ink and a liquid carrier are additively printed directly on the die or package to provide precursors for electrodes and a sensing material between the sensor electrodes. Sintering or curing removes the liquid carrier such that an ink residue remains to provide the sensor electrodes and sensing material. The sensor electrodes electrically coupled to the pins or bond pads or the die includes a wireless coupling structure coupled to the bond pads and the method includes additively printing an ink then sintering or curing to form a complementary wireless coupling structure on the completed semiconductor package coupled to the sensor electrodes so that sensing signals sensed by the sensor are wirelessly transmitted to the bond pads after being received by the wireless coupling structure.

Semiconductor package with printed sensor

A level shifter is provided. This level shifter includes a first driver, a second driver, a capacitor, and a common mode circuit. The first driver has a first signal path that is coupled between an input terminal and an output terminal, and the first driver operates in a first voltage domain. The second operates in a second voltage domain and includes a second signal path and latch. The second signal path is coupled between an input terminal and an output terminal of the second driver, and the latch that is coupled to the input terminal of the second signal path. The capacitor that is coupled between the output terminal of the first signal path and the input terminal of the second signal path, and the bias circuit is coupled to the input terminal of the second signal path and operates in the second voltage domain.

Level shifter

A method for calibrating a reflection compensator is provided. A delay is initially set to a predetermined minimum, and an input pulse is transmitted across a transmission line. A compensation current is then applied after the delay. The reflection from the transmission line is digitized to generate a measurement, and a determination is made as to whether the compensation current substantially compensates for the reflection. If the compensation current does not substantially compensate for the reflection, then the delay is adjusted, and the process is repeated until the compensation current substantially compensates for the reflection.

Method and apparatus for reflection cancellation

A method and circuit for selectively timing amplifier stages of a multi-stage reader amplifier for a hard disk drive system. The reader amplifier includes a first stage, second stage and third stage coupled in series. The method includes the steps of powering the first stage, delaying the enabling of the second stage, and delaying the enabling of the third stage, in order to reduce excursions on the third stage output signal. The circuit includes a logic circuit for successively enabling the second and third amplifier stages.

Relative timing sequence for reader amplifiers

A digital temperature monitor (DTM ( ) includes a proportional-to-absolute temperature (PTAT) sensor ( ) and reference circuit ( ) coupled to the inputs of a comparator ( ). The DTM ( ) monitors the temperature of adjacent and/or proximate integrated circuitry. The method includes the steps of providing a reference signal to the comparator ( ), increasing the reference signal voltage, and determining the temperature of an integrated circuit by determining when the reference signal is greater than the PTAT sensor ( ) output voltage. The DTM ( ) may be implemented as part of a hard-disk drive preamplifier circuit ( ).

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Madison, AL, United States of America

Paul Merle Emerson