Intel Corporation

Paul M Zagacki

Varghese George

Vladimir M Pentkovski

Deep K Buch

Edward V Gamsaragan

Jeff Ku

Gavin Sung

Tim Liu

Simon Tsai

Ivan By Wang

Christopher J Hamlin

David W Browning

Methods and apparatus relating to a mechanical system on computer with rotational projector and RealSense&#x2122; camera are described. In an embodiment, a device includes three portions: a first portion to comprise a projector; a second portion to comprise a camera; and a third portion to comprise one or more computing system components. At least the first and second portions are rotationally engaged to allow for independent rotation of the first portion and the second portion. Other embodiments are also disclosed and claimed.

Mechanical system on computer with rotational projector and RealSense&#x2122; camera

Mechanical system on computer with rotational projector and Realsense&#x2122; camera

Various embodiments are generally directed to an apparatus, method and other techniques to determine a threshold value of power for a fundamental function for a device, determine whether a current power level of a power source is equal to or less than the threshold value for the fundamental function. Further, and in response to determining the current power level is less than or equal to the threshold value, prohibit operation of an extended function, and in response to determining the current power level is not less than or equal to the threshold value, permit operation of the extended function.

Techniques to maintain power for a fundamental function on a device

A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.

Automatic dynamic processor operating voltage control

Dynamic processor operating voltage control in response to a change in a core/bus clock frequency ratio

A method of and apparatus for selective delivery of an interrupt to one of multiple processors having independent operating systems is described. The interrupts are generated from various platform devices in the computer system. Depending on the mode of operation of the system, a controller is configured to deliver interrupts to a co-processor when the host processor is off, without turning on the host processor. The interrupt may be delivered to the correct processor using wither a bus-based message or a dedicated interrupt line.

Selective interrupt delivery to multiple processors having independent operating systems

A method of and apparatus for selective delivery of an interrupt to one of multiple processors having independent operating systems is described. The interrupts are generated from various platform devices in the computer system. Depending on the mode of operation of the system, a controller is configured to deliver interrupts to a co-processor when the host processor is off, without turning on the host processor. The interrupt may be delivered to the correct processor using either a bus-based message or a dedicated interrupt line.

A Method and Apparatus for Mapping Address Space of Integrated Programmable Devices within Host System Memory is described herein.

Growing community of inventors

Lake Oswego, OR, United States of America

Paul M Zagacki