American Neuralogix, Inc.

Microchip Technology Inc.

American Neurologix, Inc.

Plessey Overseas Limited

Stromberg-carlson Corporation

Chip Supply, Inc.

American Neuralogical, Inc.

Paul M Basehore

Charles D Watson

David Ratti

Michael S Ziemacki

Thomas M Trocine

Albert A Petrick, Jr

Mike Ziemacki

An arrangement (apparatus and method) for translating pixel images representing characters or symbols into characters using fuzzy logic processing. The disclosed character translator uses two-dimensional membership functions having a center corresponding to a pixel of a feature mask representing a primitive element. A plurality of three-dimensional fuzzifiers output normalized feature mask errors corresponding to a distance error between the pixels of a feature mask and the pixels of the scanned image. The normalized feature mask errors are compared in accordance with a feature mask sequence corresponding to a known character to obtain a normalized character score. The mask sequence having the lowest normalized character score is deemed the most likely candidate as a recognized character of the scanned image. The disclosed character translator may be implemented as a low-cost serial device, or as a high-speed parallel-processing device, which may be multiplexed with other character translation devices using an expansion bus interface.

Handwritten character translator using fuzzy logic

An arrangement (apparatus and method) using fuzzy logic for fuzzifying a crisp input using a membership function defined by center, width, and type. The input signals are selected and supplied to a fuzzy input processor. The crisp input signal is fuzzified by selected center and width data corresponding to a selected membership function. Each crisp input is fuzzified by determining the distance of the crisp input from the center of the membership function and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The center and width may be fixed or dynamic values. The fuzzified input signals are successively compared in a min-max comparator which determine a minimum rule term for each rule processed. The minimum rule term is compared with a previously stored minimum rule term to determine a maximum among the minimum rule terms. The fuzzy input processor outputs a clock signal whenever a new maximum among the minimal rule terms is determined, and stores the new maximum value. The arrangement also incudes a fuzzy output processor which executes the rule identified by the fuzzy input processor as the optimum rule. A fuzzy memory interface controls the transfer of data for the fuzzy input processor and the fuzzy output processor, thereby optimizing parameter storage. The disclosed arrangement may be integrated as an integrated circuit or a software-controlled computer system.

Apparatus and method for generating a fuzzy number for use in fuzzy

An arrangement (apparatus and method) using fuzzy logic for performing signal processing functions to determine the occurrence of an event, such as a vehicle crash. An acceleration sensor signal is fuzzified by comparison with dynamic membership functions having adjustable centers from feedback inputs. Each crisp input is fuzzified by determining the distance of the crisp input from the center of the membership function and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The dynamic membership functions are used to generate an average level signal, and an accummulated energy signal. A crash detection signal is generated after a comparison between the dynamically-adjusted average level and accummulated energy signals. The uses of the dynamic membership functions provide reliable detection and a low-cost implementation.

Fuzzy microcontroller for complex nonlinear signal recognition

An arrangement (apparatus and method) using fuzzy logic controls a plurality of devices in response to inputs. The time-division-multiplexed input signals are demultiplexed and fuzzified according to predetermined fuzzy sets. Each crisp input is fuzzified by determining the distance of the crisp input from a center of the membership function of the fuzzy set and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The center may be a fixed value or a 'floating' input. The fuzzified input signals are input to an asynchronous multipath feedforward network which determines a minimum rule term for each rule processed. The multipath feedforward network is dedicated to process the fuzzified input signals in parallel and to determine the minimum rule term using a minimum amount of circuitry. A maximum comparator circuit compares the minimum rule term of each rule corresponding to an output in order to determine the rule which provides the optimum output in response to the fuzzified inputs. An output register defuzzifies the output signal, time-division-multiplexes the output signals, provides feedback to the fuzzifier, and outputs the multiplexed output signals to the devices to be controlled. Other features include a timing generator which minimizes cycle times, a timer processor which provides time-variable inputs, and a keyboard controller.

Fuzzy microcontroller

An arrangement (apparatus and method) using fuzzy logic controls a plurality of devices in response to inputs. The time-division-multiplexed input signals are demultiplexed and fuzzified according to predetermined fuzzy sets. The fuzzified input signals are input to an asynchronous multipath feedforward network which determines a minimum rule term for each rule processed. The multipath feedfoward network is dedicated to processes the fuzzified input signals in parallel and to determine the minimum rule term using a minimum amount of circuitry. Parallel processing of the fuzzified input signals is accomplished using a plurality of minimizing elements. Significant Bits of minimizing element output signals are successively compared in a NAND tree and a resulting output is fed back to the input of each minimizing element. Upon stabilization the resulting output is the minimum rule term.

Minimum comparator for fuzzy microcontroller

An arrangement (apparatus and method) using fuzzy logic for controlling a plurality of devices in response to inputs. The input signals are sequentially selected and supplied to a fuzzy input processor. The crisp input signal is fuzzified by selected center and width data corresponding to a selected membership function. Each crisp input is fuzzified by determining the distance of the crisp input from the center of the membership function and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The center and width may be fixed or dynamic values. The fuzzified input signals are successively compared in a min-max comparator which determine a minimum rule term for each rule processed. The minimum rule term is compared with a previously stored minimum rule term to determine a maximum among the minimum rule terms. The fuzzy input processor outputs a clock signal whenever a new maximum among the minimal rule terms is determined, and stores the new maximum value. The arrangement also incudes a fuzzy output processor which executes the rule identified by the fuzzy input processor as the optimum rule. A fuzzy memory interface controls the transfer of data for the fuzzy input processor and the fuzzy output processor, thereby optimizing parameter storage.

Expandable fuzzy microcontroller core

An arrangement (apparatus and method) using fuzzy logic for determining the ratios of barcode elements with respect to a reference barcode element. A barcode interface outputs width data for the reference barcode element and the other barcode elements of the barcode pattern in accordance with a predetermined barcode format. A latch array latches the width data of the reference barcode element and supplies the reference width data and a divided value of the reference width data to a fuzzy microcontroller as center and width data for a fuzzy membership function, respectively. The latch array also latches the barcode element width data from the barcode interface, divides the barcode element width data by a set of predetermined ratios, and outputs the quotient data to the fuzzy microcontroller. Each quotient data corresponding to one of the ratios is fuzzified by determining the distance of the crisp input from the center of the membership function and linearly complementing the distance with respect to the width of the membership function. The quotient data that has the highest membership value is deemed to correspond to the winning ratio. The fuzzy microcontroller uses rule-based logic that enables code recognition of the barcode scanner on the basis of successive determined ratios, as well as control of external devices in response to the determined ratios.

Fuzzy logic barcode reader

A neural processor apparatus implements a neural network at a low cost and with high efficiency by simultaneously processing a plurality of neurons using the same synaptic inputs. Weight data is sequentially accessed from an external weight RAM memory to minimize space on the IC. The input data and weight data may be configured as either a single, high-resolution input or a plurality of inputs having a lower resolution, whereby the plurality of inputs are processed simultaneously. A dynamic approximation method is implemented using a minimal amount of circuitry to provide high-resolution transformations in accordance with the transfer function of a given neuron model. The neural processor apparatus may be used to implement an entire neural network, or may be implemented using a plurality of devices, each device implementing a predetermined number of neural layers.

Neural processor apparatus

An apparatus and method for automatically updating a threshold in a fuzzy pattern comparator. A bit-field of an input data is simultaneously compared to simultaneously-input data patterns. An accumulated distance value is obtained for each data pattern, and the accumulated distance values are simultaneously compared with each other and a threshold to determine a minimum. The comparison is performed by a multipath feed-forward network which starts with the most significant bit and determines on a bit-by-bit basis and identifies which of the accumulated distance values and the threshold are a minimum. The threshold value is automatically updated to the minimum value during the comparison process if it is determined the threshold value is not a minimum. The automatic update threshold function is effective in pattern recognition systems which require periodic adaptation or adjustment in response to slowly changing pattern conditions.

Fuzzy pattern comparator having automatic update threshold function

An arrangement (apparatus and method) using fuzzy logic controls a plurality of devices in response to inputs. The time-division-multiplexed input signals are demultiplexed and fuzzified according to predetermined fuzzy sets. Each crisp input is fuzzified by determining the distance of the crisp input from a defined center of the membership function of the fuzzy set and linearly complementing the result with respect to the width of the membership function, thereby eliminating the necessity for determining the shape of the membership function. The fuzzified input signals are input to an asynchronous multipath feedforward network which determines a minimum rule term for each rule processed. The multipath feedfoward network is dedicated to processes the fuzzified input signals in parallel and to determine the minimum rule term using a minimum amount of circuitry. A maximum comparator circuit compares the minimum rule term of each rule corresponding to an output in order to determine the rule which provides the optimum output in response to the fuzzified inputs. An output register defuzzifies the output signal, time-division-multiplexes the output signals, provides feedback to the fuzzifier, and outputs the multiplexed output signals to the devices to be controlled.

A data correlator has a selectable word length for hamming distance measurement. The correlator includes four 32-bit correlators which output a correlation result and a carry signal. The input of the four 32-bit correlators is controlled by a data select circuit, which inputs serial data to each of the four 32-bit correlators in accordance with the selected word length. When the 32-bit length is selected, the data select circuit simultaneously supplies serial data to each of the 32-bit correlators; when the 64-bit length is selected, the data select circuit effectively provides two simultaneously-performing 64-bit correlators; when the 128-bit length is selected, data select circuit streams the serial data through the four 32-bit correlators. A summation circuit preserves the carry-in signal of each 32-bit correlation in order to generate two 64-bit correlation values and one 128-bit correlation value. The data comparator also includes a CPU bus interface for sharing data on a CPU bus and a control register for automatic addressing of internal registers of the data comparator.

Hamming data correlator having selectable word-length

A fuzzy data comparator receives a fuzzy data digital data bit stream and compares each frame thereof with multiple sets of differing known data stored in a plurality of pattern memories, using a selected comparison metric. The results of the comparisons are accumulated as error values. A first neural postprocessing network ranks error values less than a preselected threshold. A second neural network receives the first neural network solutions and provides an expansion bus for interconnecting to additional comparators.

Fuzzy data comparator with neural network postprocessor

To facilitate ring trip detection in a telecommunications exchange the ringing signal applied to a customer line is limited to provide a square wave output. Since when the customers instrument is 'on hook' virtually no direct current flows in the line, the square wave output has substantial 50--50 duty cycle and when the customer instrument goes 'off hook' the d.c. alters that duty cycle, by sampling the square wave signal and counting up for, say, positive samples and down for, say negative samples, any significant change in the duty cycle causes a counter to exceed a ring-trip threshold fairly rapidly. An algorithm and circuit using the algorithm to facilitate identification of 'ring trip' based on the above feature are disclosed herein.

Ring trip detection in telecommunications exchanges

A digital tone signal generator for generating digital tone words of selected frequencies and selected cadences in a predetermined number of sequential time slots for use by a telephony system. The generator stores signals representative of each of the frequencies and, in response to a timing signal from the telephony system, generates update signals representative of the amplitudes of the tones at the time the timing signal is received. The cadence is applied to the amplitude signals to obtain the output digital tone word.

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Sanford, FL, United States of America

Paul M Basehore