Honeywell G.m.b.h.

Paul J Swan

Robert L Rabe

An interface circuit to couple logic signals from a logic gate of one kind of logic family to a logic gate of another operating at different logic state voltages, where a latch circuit is used with the first of two cascaded inverters to provide the desired interface circuit signal characteristics. One inverter is provided with a supply reduction threshold means as is another inverter in the latch so that the two inverters perform substantially similarly to one another. The latch allows independent adjustments of opposite direction logic level transitions to provide a desired noise margin.

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Brooklyn Center, MN, United States of America

Paul J Swan