W. L. Gore & Associates, Inc.

Gore Enterprise Holdings, Inc.

Other

Paul J Fischer

Mark F Sylvester

William George Petefish

Robin E Gorrell

David B Noddin

John J Budnaitis

David A Hanson

Donald R Banks

William G Petefish

Ronald G Pofahl

Joseph E Korleski, Jr

C Thomas Rosenmayer

Gopalan V Balaji

Anuraag Singh

Joseph Korleski

Thomas B Schmiedel

Esen K Akpek

A microporous biocomposite that is suitable for surgical implantation in an avascular environment is provided. The microporous biocomposite includes (1) a polymer scaffold having a thickness less than about 100 μm and nodal structures that extend to at least one surface of the polymer scaffold and (2) a hydrophilic coating on the polymer scaffold. In some embodiments, the porous scaffold is a microporous biomaterial with nodal structures that extend from a first surface to a second surface of the microporous biomaterial. The hydrophilic coating may be a node and fibril coating. The microporous biocomposite allows for the integration and sustained viability of epithelial cells on the surface thereof as well as tissue integration and the internal colonization of the biomaterial with other cell types, such as keratocytes and fibroblasts. In at least one embodiment, the microporous biocomposite may be incorporated into an artificial corneal implant or in other avascular mesoplants.

Epithelializing microporous biomaterial for use in avascular environments and in corneal implants

A system and method is provided that allows for the non-interrupted coating of a pulled substrate with coating materials, even while a coated portion of the substrate is held stationary for cutting. The present invention eliminates waste and improves efficiency and yield, and is particularly applicable to laboratory drawdown coaters.

System and method for continuously pulling substrates through a coater

Tiedown systems and methods to attach a vehicle to a support floor. The tiedown system may include a wheel cage configured to be attached to the support floor and to receive a wheel of the vehicle. The tiedown system may also include a locking assembly comprising a pivoting lever arm and an engagement member attached to the lever arm. The lever arm may be pivotal between an unlocked position to attach the engagement member to the vehicle, and a locked position that causes the engagement member to exert a force on the vehicle to maintain the wheel of the vehicle in the wheel cage.

Vehicle tiedown systems and methods of use

An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T greater than 200&deg; C. and a volumetric coefficient of thermal expansion of &lE;75 ppm/&deg; C. A semiconductor device is electrically attached to the laminated substrate.

Electronic chip package

A dimensionally stable core for use in high density chip packages is provided. The stable core is a metal core, preferably copper, having clearances formed therein. Dielectric layers are provided concurrently on top and bottom surfaces of the metal core. Metal cap layers are provided concurrently on top surfaces of the dielectric layers. Blind or through vias are then drilled through the metal cap layers and extend into the dielectric layers and clearances formed in the metal core. If an isolated metal core is provided then the vias do not extend through the clearances in the copper core. The stable core reduces material movement of the substrate and achieves uniform shrinkage from substrate to substrate during lamination processing of the chip packages. This allows each substrate to perform the same. Additionally, a plurality of chip packages having the dimensionally stable core can be bonded together to obtain a high density chip package.

Dimensionally stable core for use in high density chip packages and a method of fabricating same

A constraining ring increases the modulus of an interconnect substrate to maintain flatness of the substrate. The constraining ring is made of materials selected to match the coefficient of thermal expansion of the substrate to that of the constraining ring. Circuit components including capacitors and resistors are formed on the constraining ring to provide enhanced electrical properties without adding to the size of the device.

Constraining ring for use in electronic packaging

An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T.sub.g greater than 200.degree. C. and a volumetric coefficient of thermal expansion of .ltoreq.75 ppm/.degree.C. A semiconductor device is electrically attached to the laminated substrate.

A method of minimizing warp and die stress in the production of an electronic assembly includes connecting one surface of a die to a package, and connecting an opposite surface of the die to a lid disposed over a constraining ring that is mounted to the package. The lid has a size, shape and coefficient of thermal expansion (CTE) selected to generate a bending moment that opposes bending moments resulting from connecting the die to the package.

Method for minimizing warp and die stress in the production of an

The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.

Method for assembling an integrated circuit chip package having an

In a method for forming redundant signal traces and corresponding electronic components, a photoresist pattern which defines a semi-additive signal image is coated on at least one first conductive layer of a composite base substrate. A barrier layer of etch-resistant metal is deposited on the first conductive layer. The photoresist is removed, thereby forming a first barrier signal trace having a first line width. Optionally, one or more vias may be formed in the substrate. A surface conductive layer is deposited on the first conductive layer, the barrier layer, and on a surface of the optional vias. A photoresist pattern is coated on the surface conductive layer which defines a subtractive signal image. Predetermined portions of the surface conductive layer and the first conductive layer are removed. The photoresist is removed forming a second signal trace in overlying relationship with the first barrier signal trace and having a second line width greater than the first line width.

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Eau Claire, WI, United States of America

Paul J Fischer