Raytheon Company

Quantum Corporation

Schlumberger Technologies, Inc.

Matsushita-kotobukie Electronics Industries, Ltd.

Paul J Duval

Andrew L Wu

John P Bettencourt

Neal T Sullivan

Vladimir Vayner

Kamal Tabatabaie

William J Davis

Ward G Fillmore

Thomas Ferraguto

Jeffrey R LaRoche

Kelly P Ip

Christopher J MacDonald

Paul M Alcorn

James W McClymonds

Michael S Davis

Ira Rosenberg

Allan I Rubin

Anastasia Tyurina

Philip C Balas, Ii

Paul M Ryan

A field effect transistor, comprising a gate contact and gate metal forming a vertical structure, such vertical structure having sides and a top surrounded by an air gap formed between a source electrode and a drain electrode of the field effect transistor.

Field effect transistor having improved gate structures

Forming an ohmic contact sealing layer disposed at an intersection between a sidewall of an ohmic contact and a surface of a semiconductor; forming an ohmic contact sealing layer on the intersection between a sidewall of the ohmic contact and the surface of the semiconductor; and subjecting the semiconductor with the ohmic contact to a chemical etchant.

Ohmic alloy contact region sealing layer

Methods and apparatus for an integrated circuit having with a frontside metal layer on the frontside of the substrate and a backside metal layer on the backside of the substrate. The backside metal layer is deposited onto the backside of the substrate and into the via such that a portion of the backside metal layer is connected to a portion of the frontside metal layer. A diffusion barrier layer is deposited on the backside metal layer located in the via.

Patterned wafer solder diffusion barrier

A substrate having an air bridge structure with end portions disposed and supported on the substrate and an elevated portion disposed between the end portions is coated with a protective layer. The protective layer is patterned to: leave portions of the protective layer over elevated portion and at least over the end portions of a region under the elevated portion of the air bridge structure; and remove portions over adjacent portions of the substrate. A dielectric material having a thickness greater than the height of the air bridge structure is deposited over the patterned protective layer portions remaining over elevated portion and over the adjacent portions of the substrate, the patterned temporary coating preventing the dielectric material from passing into the region under the elevated portion of the air bridge structure. The dielectric material is patterned to remove portions of the dielectric material over the patterned protective layer remaining over elevated portion while leaving the dielectric material over the adjacent portions of the substrate. The patterned protective layer portions remaining over elevated portion are removed while leaving the dielectric material over the adjacent portions of the substrate.

Air bridge structure having dielectric coating

A semiconductor structure having a substrate; an active device formed in an active semiconductor region of the substrate, the active device having a control electrode for controlling a flow of carriers through the active semiconductor region between a pair of electrical contacts; and a photolithographic, thickness non-uniformity, compensation feature, disposed on the surface substrate off of the active semiconductor region. In one embodiment the feature comprises pads on the surface of the substrate and off of the active semiconductor region.

Photolithographic, thickness non-uniformity, compensation features for optical photolithographic semiconductor structure formation

Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.

Method for processing semiconductors using a combination of electron beam and optical lithography

An apparatus for imaging the surface of a sample, such as a scanning electron microscope. The apparatus generates a beam of charged particles directed at the surface, and includes an objective lens and an electrostatic lens for controlling the particle beam. The objective lens and the electrostatic lens constitute a compound lens that has an axis. The beam is controlled so that it travels along the axis of the compound lens in order to avoid adverse consequences induced by, for example, mechanical misalignments and as manifested when the focus of one of the objective and electrostatic lenses is changed during operation of the apparatus.

Beam alignment in a lower column of a scanning electron microscope or the like

In instruments such as Wien filters, electrostatic and/or magnetic pole pieces must be mounted on and secured to a supporting structure with a very high degree of dimensional precision, usually by brazing. To that end, a fixture is provided for holding the parts to be assembled in precise relationship and to press the pole pieces into engagement with the supporting structure while the securing operation is being carried out. The pressing is accomplished by a gravity-produced force which is, therefore, independent of positional accuracies caused by very high temperatures, such as are encountered during brazing.

Fixture for assembling parts of a device such as a Wien filter

A charged particle filter such as a Wien filter in which components used as the pole pieces and electrodes are precisely and reliably secured to a supporting structure through which they extend and to which they are brazed. Electrical insulating gaps in the magnetic circuit are located very remotely from the pole faces of the pole pieces so as to minimize any adverse effect of the gaps on the produced magnetic field.

Wien filter for use in a scanning electron microscope or the like

A pole-trimmed writer for an MR read/write data transducer which may be produced without significant re-deposition of Al.sub.2 O.sub.3 or NiFe on the sides of the writer poles. The process disclosed herein advantageously provides an upper (top) pole which is processed to project a pair of relatively thin, laterally extending lower flanges, prior to the use of the upper pole as a mask to subsequent ion milling of the lower pole, or shared shield. In a preferred embodiment, the process for producing the flange is implemented in conjunction with the deposition of a single copper (Cu) or dual Al.sub.2 O.sub.3 and chromium (Cr) overlayers formed on the upper pole seed layer followed by the top pole formation and selective removal of a predetermined amount of the underlying portions of the gap material prior to a subsequent ion milling operation and further processing of the read/write head.

Process for producing a pole-trimmed writer in a magnetoresistive

The process of the present invention is used to form resist features (22) having controlled predefined cross-sectional profiles, and is particular useful for forming features having reentrant profiles (24). In the process, a layer of a basic agent is formed on the substrate surface (20). Thereafter, a resist layer is formed on the layer of basic agent, causing at least a portion of the basic agent to diffuse into regions of the resist layer. The resist layer is exposed to radiant energy through a mask to form a patterned resist layer, which is developed to form resist features (22) having reentrant profiles (24) at those regions of the resist layer containing the diffused basic agent. The reentrant resist features (22) formed by the present method facilitates manufacture of magnetic heads, magnetoresistive sensors (102), and electronic components.

Method for forming photoresist features having reentrant profiles using

A method of making a thin film magnetic head having multi-layer coils wherein a raised insulative photoresist spiral pattern having undercut sidewalls is formed. Two layers of coils are fabricated simultaneously by evaporating metal onto the upper surface of the spiral pattern and in spaces between the pattern. The cross-section of the bottom coil decreases in width with an increase in height. The coils are insulated from each other with a layer of insulative photoresist.

Growing community of inventors

Lexington, MA, United States of America

Paul J Duval