Intel Corporation

Paul G Huray

Michael W Leddige

Chaitanya Sreerama

Stephen H Hall, Jr

Jason A Mix

Olufemi B Oluwafemi

Maynard C Falconer

Earl J Wight

Jose A Sanchez Sanchez

Techniques for decoding encoded data are described herein. An example of a device in accordance with the present techniques includes a receiving signaling module coupled to a plurality of signal lines. The signaling module includes a receiver to receive a plurality of encoded line voltages or currents on the plurality of signal lines of a bus, wherein each one of the plurality of encoded line voltages corresponds to a weighted sum of data. The signaling module includes a comparator to determine the voltage level of each line at a unit interval and convert the voltage level to a digital value. The signaling module includes a lookup table correlating the digital value with a digital bit stream.

Crosstalk aware decoding for a data bus

Techniques for encoding data are described herein. An example of a device in accordance with the present techniques includes a signaling module coupled to a plurality of digital inputs. The signaling module is to encode data received at the plurality of digital inputs to generate encoded data. Based on the encoded data, the signaling module can drive line voltages on a plurality of signal lines of a bus. Each one of the plurality of line voltages corresponds to a weighted sum of the data received at the plurality of digital inputs.

Crosstalk aware encoding for a data bus

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Georgetown, SC, United States of America

Paul G Huray