Infineon Technologies Ag

Infineon Technologies Austria Ag

Paul Frank

Frank Wagner

Oliver Schilling

Joachim Seifert

Ralf Otremba

Alexander Heinrich

Werner Robl

Evelyn Napetschnig

Stefan Woehlert

Sven Schmidbauer

Tobias Schmidt

Kamil Karlovsky

Daniel Pedone

Eric Graetz

Michael Ehmann

Gretchen Adema

Alexandra Ludsteck-Pechloff

Thomas Bertaud

Thomas Heinelt

Ulrich Wilke

Frederik Otto

Roman Immel

Altan Toprak

Lars Boewer

A semiconductor device includes a semiconductor die including a first side and an opposing second side, a first metallization layer arranged on the first side, a Ni including layer arranged on the second side, wherein the Ni including layer further includes one or more of Si, Cr and Ti, and a SnSb layer arranged on the Ni comprising layer, wherein an amount of Sb in the SnSb layer is in the range of 2 wt % to 30 wt %.

Semiconductor device with a nickel comprising layer and method for fabricating the same

A semiconductor package includes a power semi conductor chip comprising SiC, a leadframe part including Cu, wherein the power semiconductor chip is arranged on the leadframe part, and a solder joint electrically and mechanically coupling the power semiconductor chip to the leadframe part, wherein the solder joint includes at least one intermetallic phase.

Semiconductor package and method for fabricating a semiconductor package

A semiconductor device includes a semiconductor wafer or a single semiconductor chip or die, and a layer stack. The layer stack comprises a first layer comprising NiSi, and a second layer comprising NiV, wherein the second layer is arranged between the first layer and the semiconductor wafer or single semiconductor chip or die.

Semiconductor device having a layer stack, semiconductor arrangement and method for producing the same

Semiconductor device, semiconductor arrangement and method for producing the same

A semiconductor package includes a power semiconductor chip comprising SiC, a leadframe part comprising Cu, wherein the power semiconductor chip is arranged on the leadframe part, and a solder joint electrically and mechanically coupling the power semiconductor chip to the leadframe part, wherein the solder joint comprises at least one intermetallic phase.

An electronic device, an electronic module comprising the electronic device and methods for fabricating the same are disclosed. In one example, the electronic device includes a semiconductor substrate and a metal stack disposed on the semiconductor substrate, wherein the metal stack comprises a first layer, wherein the first layer comprises NiSi.

Electronic device, electronic module and methods for fabricating the same

An electronic device comprises a semiconductor die, a layer stack disposed on the semiconductor die and comprising one or more functional layers, wherein the layer stack comprises a protection layer which is an outermost functional layer of the layer stack, and a sacrificial layer disposed on the protection layer, wherein the sacrificial layer comprises a material which decomposes or becomes volatile at a temperature between 100&#xb0; and 400&#xb0; C.

Sintering method using a sacrificial layer on the backside metallization of a semiconductor die

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Villach, Austria

Paul Frank