Georgia Tech Research Corporation

USA As Represented by Secretary of the Navy

Paul Edward Hasler

David Verl Anderson

Jordan Gray

Venkatesh Srinivasan

Guillermo José Serrano

Guillermo J Serrano

Christopher M Twigg

Matthew Raymond Kucic

Joseph D Neff

Edgar A Brown

Brian Meadows

Erhan Ozalevli

David Wilson Graham

Philomena Cleopha Brady

Steve P DeWeerth

William Lawrence Ditto

Visarath In

Jeffery Dugger

Paul Smith

David W Fogliatti

Robert A York

Sheng-Yu Peng

Angelo W Pereira

Tyson S Hall

Abhishek Bandyopadhyay

Ravi Chawla

Walter Geeshan Huang

Ethan Farquhar

Farhan Adil

Brian Degnan

Christal Gordon

David Abramson

Arindam Basu

Ted H Heath

Richard Thompson Ellis

Heejong Yoo

Haw-Jing Lo

The present invention describes systems and methods to for providing stable and programmable voltage and current reference devices. An exemplary embodiment of the present invention provides a voltage reference device having a first floating-gate transistor with a first source, a first drain, and a first gate. The first gate is provided coupled to a first programming capacitor and a first input capacitor. Furthermore, the voltage reference device includes a second floating-gate transistor having a second source, a second drain, and a second gate. The second gate is provided coupled to a second programming capacitor and a second input capacitor. Additionally, the charge difference between the first floating-gate transistor and the second floating-gate transistor is a reference voltage.

Systems and methods of providing programmable voltage and current reference devices

An operational amplifier including: a differential pair of transistors coupled to a pair of input signals; and a pair of floating-gate transistors coupled to the differential pair of transistors, wherein the pair of floating-gate transistors are operable for reducing an offset voltage of the operational amplifier.

Method and device for performing offset cancellation in an amplifier using floating-gate transistors

The present invention describes systems and methods for improving the programming of floating-gate transistors. An exemplary embodiment of the present invention provides a floating-gate transistor programming system including an array of floating-gate transistors and a measuring circuit comprising a logarithmic transimpedance amplifier and an analog-to-digital converter. Furthermore, the floating-gate transistor programming system includes an injecting circuit comprising a digital-to-analog converter, wherein the pulsing circuit can inject charge into each of the floating-gate transistors and the measuring circuit can measure a present charge value in one of the plurality of floating-gate transistors.

Systems and methods for improved floating-gate transistor programming

One preferred embodiment of the present invention provides systems and methods for removing noise from an input analog signal in continues time. Briefly described in architecture, one embodiment of the system, among others, can be implemented as follows. An analog filtering system including VLSI circuitry separates an analog input signal into a plurality of sub-band signals. Then, an analog gain system including VLSI circuitry calculates a gain for each sub-band signal that suppresses the noise within the sub-band signal. In some preferred embodiments, VLSI circuitry includes floating gate technology. Methods and other systems are also provided.

Analog audio signal enhancement system using a noise suppression algorithm

Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.

Analog-to-digital converter with programmable floating gate

A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be adapted to set bias voltages for operational transconductance amplifiers (OTAs), adjust corner frequencies on the capacitively coupled current conveyors, set multiplier coefficients in vector-matrix multipliers, and a variety of other operations. The floating-gate transistors may be used as switch elements, programmable resistor elements, precision current sources, and programmable transistors. Accordingly, the floating-gate transistors within the array allow on-chip programming of the characteristics of the computational elements, while still maintaining compact CABs. The arbitrary analog waveform generator may include programmable floating-gate MOS transistors for use as analog memory cells to store samples of the waveforms.

Systems and methods for programming large-scale field-programmable analog arrays

Digital-to-analog converter with programmable floating gate

Disclosed herein is a reconfigurable mixed signal distributed arithmetic system including: an array of tunable voltage references operable for receiving a delayed digital input signal; a combination device in electrical communication with the array of tunable floating-gate voltage references that selectively combines an output of the array of tunable voltage references into an analog output signal; and a feedback element in electrical communication with the combination device, wherein the array of tunable voltages and the delayed digital input signal combine to perform a distributed arithmetic function and the reconfigurable mixed signal distributed arithmetic system responsively generates the analog output signal.

Reconfigurable mixed-signal VLSI implementation of distributed arithmetic

The present invention relates to systems and methods for sensing capacitance change of a capacitive sensor and for optimizing a capacitive sensing circuit. In an exemplary embodiment, a capacitive sensor may be coupled to an amplifier at floating node. A programming circuit is connected to the floating node for controlling a charge on the floating node. A method of controlling the charge of the floating node is also provided. The method includes applying a first predetermined voltage to a source of a programming transistor, applying a second predetermined voltage to a floating gate of the programming transistor, and applying a third predetermined voltage to a drain of the programming transistor until a charge on the floating gate of the programming transistor reaches a predetermined value. The charge on the floating gate of the programming transistor drives the charge on the floating node to the predetermined value, and thus is controlled.

System and method for sensing capacitance change of a capacitive sensor

Current mirror with programmable floating gate

A digital to analog converter (DAC) includes an operational amplifier and a plurality of ladder elements. Each ladder element includes an epot for providing a voltage, a capacitor, and a switch for selecting between a first voltage and a reference voltage, and for providing the first selected voltage to the first capacitor. The output of the ladder elements are coupled to the inverting input of the operational amplifier. Alternatively, the ladder elements may use tunable floating-gate resistors.

Programmable voltage-output floating-gate digital to analog converter and tunable resistors

A floating-gate transistor array and method for programming the same. The floating-gate transistor array includes a plurality of transistors having a source, drain, and floating-gate, whereby the plurality of transistors is arranged into multiple rows and columns. Each row of transistors includes a row programming switch having an output connected to each floating-gate within the row, while each column of transistors includes a column programming switch having an output connected to each drain within the column. The source of each transistor is coupled with a source line corresponding to the specific row of the transistor. The row and column programming switches are utilized to select and program a desired floating-gate transistor. In an indirect programming method, two transistors share a floating gate, such that programming a programmer transistor modifies the current of an agent transistor, which is attached to the circuit, thereby permitting run-time programming.

Systems and methods for programming floating-gate transistors

This invention exploits the synchronization properties of coupled, nonlinear oscillators arrays to perform power combining, beam steering, and beam shaping. This architecture utilizes interactions between nonlinear active elements to generate beam patterns. A nonlinear array integrates the signal processing concurrently with the transduction of the signal. This architecture differs fundamentally from passive transducer arrays in three ways: 1) the unit cells are nonlinear, 2) the array purposely couples the unit cells together, and 3) the signal processing (beam steering and shaping) is done via dynamic interactions between unit cells. The architecture extends to both 1- and 2-dimensional arrays.

Nonlinear beam forming and beam shaping aperture system

Floating-gate reference circuit

Growing community of inventors

Atlanta, GA, United States of America

Paul Edward Hasler