Hughes Network Systems, LLC

Paul E LaCasse

Emanuel Harrington

Raymond Helfrich

Mohana Subhash Oltikar

Bala Subramaniam

Suchita Sahu

Emanuel Girard Harrington

A system comprises a computer having a processor and a memory, the memory storing instructions executable by the processor to identify data to be communicated to a satellite gateway via a satellite, the data including first data and second data, determine to communicate the data to the satellite gateway in a time-division multiplexing (TDM) and time-division multiple access (TDMA) (TDM/TDMA) concurrent transmission mode, and responsive to the determination to communicate the data to the satellite gateway in the TDM/TDMA concurrent transmission mode, transmit the first data to the satellite according to a TDM channel access scheme and transmit the second data to the satellite according to a TDMA channel access scheme that differs from the TDM channel access scheme.

TDM and TDMA concurrent mode transmission

Systems and methods are provided for increasing or decreasing the transmission speed of a VSAT used in a satellite network. A VSAT may include an ASIC and an FPGA in a transmission block of the VSAT. The ASIC includes an ASIC transmit modulator configured to modulate an input information signal, and circuitry for bypassing at least a portion of the ASIC transmit modulator. The FPGA includes circuitry for receiving a signal bypassing at least a portion of the ASIC transmit modulator, and an FPGA transmit modulator configured to modulate the bypassed signal. In implementations, the system uses the ASIC to burst format an input information signal with a payload burst segment; bypasses a transmit modulator of the ASIC after burst formatting the input information signal with the ASIC; and uses an FPGA to insert additional burst segments into the ASIC burst-formatted signal.

Systems and methods for increasing the transmission speed of a satellite VSAT

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New Market, MD, United States of America

Paul E LaCasse