Matsushita Electric Corporation of America

Matsushita Electric Corp., Ltd.

Paul D Frantzis

Theodore S Rzeszewski

Sotirios Sideris

A television tuning system employs a frequency synthesizer system for establishing the tuning of the receiver. A first programmable frequency divider controlled by a reversible counter is connected between the output of a reference oscillator and a phase comparator to which the output of the local oscillator, after passing through another programmable frequency divider, also is applied. The phase comparator output is a tuning voltage used to control the tuning of the local oscillator. A logic circuit responsive to characteristics of the received signals changes the count in the reversible binary counter to adjust the first programmable frequency divider to compensate for channel frequency offsets which may occur in excess of the pull-in range of the AFT discriminator circuit. To permit operation of the receiver as a signal seek receiver, a pair of signal seek push buttons for the 'up' and for the 'down' direction, respectively, are provided. Operation of either of these push buttons functions in conjunction with further logic circuitry and in conjunction with timing circuitry to automatically step tune the receiver channel-by-channel in the selected direction until a channel with a signal present is sensed by the first logic circuit, whereupon the signal seek circuit operation is disabled until one or the other of the signal seek push buttons is reactivated. The dwell time of the logic circuit for some steps is extended depending upon the relationship of the new channel to the previous channel. The dwell time also is extended for manual or direct access channel selection.

Frequency synthesizer tuning system with variable dwell signal seek

A television tuning system employs a frequency synthesizer system for establishing the tuning of the receiver. A first programmable frequency divider controlled by a reversible counter is connected between the output of a reference oscillator and a phase comparator to which the output of the local oscillator, after passing through another programmable frequency divider, also is applied. The phase comparator output is a tuning voltage used to control the tuning of the local oscillator. A logic circuit is coupled to sense predetermined relationships of signals from a picture carrier detector, a sound carrier detector, an AFT discriminator circuit, and the presence of vertical synchronization signal components for changing the count in the reversible binary counter to adjust the first programmable frequency divider to compensate for channel frequency offsets which may occur in excess of the pull-in range of the AFT discriminator circuit. To permit operation of the receiver as a signal seek receiver, a pair of signal seek pushbuttons for the 'up' and for the 'down' direction, respectively, are provided. Operation of either of these pushbuttons functions in conjunction with further logic circuitry and in conjunction with timing circuitry to automatically step tune the receiver channel-by-channel in the selected direction until a channel with a signal present is sensed by the first logic circuit, whereupon the signal seek circuit operation is disabled until one or the other of the signal seek pushbuttons is reactivated.

Frequency synthesizer tuning system with signal seek control

A television tuning system employs a frequency synthesizer system for establishing the tuning of the receiver. A first programmable frequency divider controlled by a reversible counter is connected between the output of a reference oscillator and a phase comparator to which the output of the local oscillator, after passing through another programmable frequency divider, also is applied. The phase comparator output is a tuning voltage used to control the tuning of the local oscillator. A logic circuit is coupled to sense predetermined relationships of signals from a picture carrier detector, a sound carrier detector, an AFT signal, and the presence of vertical synchronization signal components for changing the count in the reversible binary counter to adjust the first programmable frequency divider to compensate for channel frequency offsets which may occur in excess of the pull-in range of the AFT circuit. To enable operation of the receiver in a fringe area, where it may be desirable to intentionally mistune a channel slightly, manual fine tuning control logic circuitry is employed to disable the frequency offset logic circuit and to permit changing the count of the reversible counter by the viewer to manually fine tune the receiver as desired.

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Chicago, IL, United States of America

Paul D Frantzis