Lucent Technologies Inc.

Agere Systems Inc.

Bell Telephone Laboratories

At&t Bell Laboratories

American Telephone & Telegraph Co., At&t Bell Laboratories

Agere Systems Guardian Corp.

American Telephone and Telegraph, Co.

Paul C Davis

Kirk B Ashby

Raymond G Jackson

Dale Harvey Nelson

Brian Albert Wittman

Joseph J Nahas

Brian K Horton

Michael D Womac

DeWitt G Ong

Douglas D Lopata

Thomas Baker

Malcolm Harold Smith

Milton L Embree

George Edward Andrews

Stanley H Kravitz

Thrygve R Meeker

Dennis L Whitson

Kenneth F Sodomsky

Arthur W Schelling

Owe G Petersen

Trudy Dawn Stetzler

Dennis C Farley

Irving G Post

Scott L Forgues

Owe George Petersen

Iconomos A Koullias

A method for reducing an effective lateral resistance of a buried layer in an IC includes forming first and second circuit sections in a common substrate, the second circuit section being spaced laterally from the first circuit section. The method further includes forming an isolation buried layer in the substrate under at least a portion of the first circuit section and forming a conductive layer on a surface of the substrate, the conductive layer overlaying at least a portion of the first circuit section. A plurality of conductive plugs are formed in the substrate for operatively connecting the isolation buried layer to the conductive layer, whereby an effective lateral resistance of the isolation buried layer is reduced.

Mixed signal integrated circuit with improved isolation

An integrated circuit having improved isolation includes a first circuit section formed in a substrate and a second circuit section formed in the substrate, the second circuit section being spaced laterally from the first circuit section. The integrated circuit further includes an isolation buried layer formed under at least a portion of the first circuit section, and a conductive layer formed on a surface of the substrate and electrically coupled to the buried layer and to a voltage reference, the conductive layer reducing an effective lateral resistance of the buried layer, whereby an isolation between the first and second circuit sections is increased. A second isolation buried layer can be formed under at least a portion of the second circuit section as well to provide further isolation between the first and second circuit sections.

A balancing circuit and method of operation thereof for use with a circuit having first and second complementary drivers exhibiting different current gain characteristics. In one embodiment, the balancing circuit includes a sensing subcircuit that provides a correction signal indicating a first current gain characteristic of the first driver. The balancing circuit also includes a compensation subcircuit that generates a current gain compensation signal to the first driver to substantially match a second current gain characteristic of the second driver based on the correction signal.

Balancing circuit, method of operation thereof and a charge pump employing the same

An integrated circuit including a transistor having a first electrode coupled to an output bond pad and a second electrode coupled to a reference potential, such as ground bond pad. A degeneration device is coupled between the second electrode and the reference potential. A diode is coupled between the second electrode of the transistor and the reference potential with the anode of the diode coupled to the second electrode reference potential and the cathode of the diode coupled to the reference potential for an NPN transistor.

Output stage ESD protection for an integrated circuit

An integrated circuit is disclosed in which a steering diode is coupled between an input bond pad and a ground bond pad. The steering diode is reverse biased when a voltage applied to the input bond pad exceeds the voltage at the ground bond pad. A circuit coupled between the input bond pad and the ground bond pad includes a transistor having a first electrode coupled the input bond pad and a second electrode coupled to the ground bond pad. There may be other circuit elements between the emitter and the ground bond pad. At least two series coupled diodes are coupled between the input bond pad and the ground bond pad. The at least two series coupled diodes provide ESD protection to the transistor and circuit coupled between the input bond pad and the ground bond pad.

Input stage ESD protection for an integrated circuit

The voltage-controlled current source receives a control voltage from an operational amplifier which itself receives a reference voltage at one input from a bias circuit. The voltage-controlled current source applies current to the base of the amplifier's main transistor. The base of the transistor is also coupled to the input node of the amplifier through a DC-blocking capacitor and through a feedback loop to the other input of the operational amplifier. The voltage-controlled current source operates to maintain the voltage at the base of the transistor relatively constant for a wide range of input signal levels. As a result, the amplifier is able to operate at relatively low power supply voltages (e.g., as low as 2V) without suffering from premature gain compression at relatively high input signal levels (e.g., as high as 0.4V).

Integrated amplifier having a voltage-controlled current source

In low-voltage circuits, there is often insufficient voltage to use a current source to bias a transconductance amplifier stage. This is particularly true in mixers where a switching circuit must be stacked on top of the transconductance input stage. One way around this problem is to get 'double-duty' out of the input differential pair, using it both for gain stage and for DC bias. This is done by AC coupling in a high-frequency input signal, while using a low-frequency, DC-coupled circuit to establish the proper bias level. One common technique is to use a simple current mirror scheme to establish the DC level. Proper biasing using this technique requires good matching of resistance. In some implementations of transconductance amplifiers, particularly those that use inductors as degeneration elements, series resistance of the inductor and interconnect resistance can cause significant errors in the bias current. This invention addresses that problem by using an operational amplifier with a current-sensing resistor and a low-frequency feedback loop to compensate automatically for any resistance errors. The operational amplifier drives the feedback voltage (generated in accordance with the sensed voltage at the current-sensing resistor and applied to one input of the operational amplifier) towards a reference voltage that is applied to the other input of the operational amplifier to bias the transistor(s) in the transconductance amplifier for desired operating conditions.

Bias circuit for transconductance amplifier

A power-conserving, linear and broad band RF amplifier, suitable for use at more than one band in the ultra-high frequency regions allotted to radiotelephone transceivers, employs an emitter-follower output transistor to deliver the nominal 1.0 milliwatt RF power to a single-ended load from a low voltage battery, typically 2.7 v. dc, without the use of output coupling transformers. The amplifier receives only a small differential input signal from the preceding mixer or multiplier stage having a typical peak-to-peak magnitude of 0.3 v. The differential input signal is applied to the emitters of a pair of transistors whose bases are interconnected, one transistor of which (B6) is diode-connected in a current-mirror configuration and the other (B5) of which is configured in a common-base connection with emitter degeneration. The signals are summed at the collector of the common-base transistor to deliver a substantial voltage swing, illustratively 1.7 volts peak to peak, which is large enough to drive the base of the emitter-follower output transistor (B3) without requiring the high standby current in the emitter-follower normally required to maintain an emitterfollower in Class A operation.

Low-voltage radio frequency amplifier

A compensation scheme for differential- or single-input transconductance amplifiers relies on an active feedback path with a resistive pole-splitting compensation circuit. The resistive compensation circuit causes pole-splitting of the two dominant poles, moving one pole to a slightly lower frequency and the other to a much higher frequency compared to the dominant poles of the uncompensated amplifier. A DC-blocking capacitor may also be placed in series with the resistor of the compensation circuit to allow for proper biasing of the circuit. By selecting appropriate values for the passive elements in the compensation circuit, the compensation scheme of the present invention can cause the amplifier to operate in a stable, linear manner over the same or even a larger bandwidth than an equivalent amplifier without compensation. The present invention does not suffer the problems of standard narrowbanding compensation schemes associated with high frequency cut-off.

Broadband linear transconductance amplifier with resistive

The present invention relates to a radio receiver adapted for use in a time division multiple access (TDMA) system. The radio receiver includes DC compensator circuits configured to decrease the time required to cancel DC offset before received data bursts by DC coupling a radio frequency (RF) demodulator to a baseband channel. The radio receiver may also employ AC capacitive coupling having time modification so as to increase the AC coupled setting time and provide a low pole in a RF-to-Baseband interface.

Radio receiver with DC offset correction circuit

The present invention provides an RF transmitter network for cellular telephone systems. The network includes power amplifier circuitry which coupled to a closed loop control system to provide a controllable RF amplitude envelope for the output power of the amplifier circuitry over a dynamic range of between about 5 milliwatts and about 3200 milliwatts.

Power controller for RF transmitters

An amplifier with variable gain which maintains high Q when saturated. A resonant circuit is connected between collector outputs of a differential pair of transistors and RF chokes couple DC supply current to the transistors. The chokes have a high impedance at the desired frequency. The emitters of the differential pair of transistors couple together to form a common output which is connected to a current source. The amount of current from the current source substantially controls the gain of the amplifier. Because the resonant circuit is not shunted with a low impedance even when one of the transistors saturates, the Q of the resonant circuit is maintained.

RF variable gain tuned output amplifier which maintains high Q in

Differential amplifier having multiple stages, each stage having the gain thereof set by digital control. The gain of each stage is individually controlled, thereby allowing wide dynamic range and gain. Each stage has a differential pair with multiple sets of gain-setting resistors in the emitters of the pair. By selecting which resistor set, or combination of resistor sets, is used, the gain of the stage is controlled. The result is a 4 stage, 0-45 dB gain amplifier for RF or IF applications, with the gain adjustable in 3 dB increments.

Differential amplifier with digitally controlled gain

A clock recovery and data retiming circuit is disclosed which utilizes a SAW filter to form the recovered clock signal. The phase shift of the received data signal associated with various attenuation and distortion effects of the communication channel is compensated for and removed from the retimed data signal by adjusting the phase of the SAW filter.

Clock recovery and retiming scheme with saw filter phase trimming to

A digital-to-analog signal converter (1000) provides an analog output signal by subtracting bit currents reflecting a digital input signal from a constant current source (1004, 1018-1022) at a current summer (1003), with the difference current being applied to a constant load. The subtracting of the current, rather than switching the current, avoids the modulation of an associated power source since the total current demand remains the same. In that low power operation is possible, the converter is particularly suited for use in an arrangement where only a low level of operating current is available from a power source.

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Reading, PA, United States of America

Paul C Davis