Viavi Solutions Deutschland Gmbh

Jdsu Deutschland Gmbh

Viavi Solutions Deustschland Gmbh

Paul Brooks

Reiner Schnizler

Bernhard Mayer

A test device for testing a device under test (DUT) includes an integrated control interface adaptable for a plurality of different communication standards. The integrated control interface can be adapted to be compliant with the communication standard used by a DUT connected to the test device.

Test device and method

The invention relates to a method and device for testing a data link. A single-lane or multi-lane bit error tester that transmits one or more PRBS signals through the data link is augmented with a raw bit error buffer for storing bit error information for each detected error event and an error pattern analyzer. Most frequently occurring intra-lane bit error patterns, inter-lane word error patterns, and bit slip patterns are identified and their characteristics are analyzed so as to provide information indicative of root causes of the detected bit errors and bit slips.

Bit error pattern analyzer and method

A test device is provided for testing a device under test (DUT) having a control interface compliant with a standard selected from a plurality of standards each supporting a common set of management data input/output (MDIO) and non-MDIO control signals. The test device includes a test interface and an integrated control interface. The integrated control interface adapts to the standard with which the control interface of the DUT complies, so that the integrated control interface directly and fully controls the DUT via at least the common set of MDIO and non-MDIO control signals. The integrated control interface exchanges control signals selected from the common set of MDIO and non-MDIO control signals with the control interface of the DUT to monitor the DUT and thereby obtain status information about the DUT.

For an apparatus which communicates data of a number of virtual lanes over a number of physical lanes, where the number of virtual lanes is different than the number of physical lanes and where a mapping between the virtual lanes and the physical lanes is not fixed, a method is provided for ascertaining the mapping between the virtual lanes and the physical lanes. The method includes: applying an impairment to a communication capability of one of the physical lanes so as to increase bit errors for data communicated via said one physical lane; determining a test bit error rate for each of the plurality of virtual lanes while the impairment is applied to the communication capability of the one physical lane; and ascertaining from the test bit error rates which of the virtual lanes is/are mapped to the one physical lane whose communication capability was impaired.

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Ofterdingen, Germany

Paul Brooks