Apple Inc.

Other

Paul Aurelio Martinez

Albert Wang

Curtis C Mead

Ming Yuan Tsai

Jason C Sauers

Scott D Morrison

Martin Schauer

Tyler S Bushnell

Brad W Simeral

Lin Chen

Cheung-Wei Lam

Federico Pio Centola

Giancarlo F De La Cruz

Won Seop Choi

Shawn Xavier Arnold

Connor Raymond Duke

Benjamin A Bard

Wyeman Chen

Kieran Poulain

Andro Radchenko

Justin P Dobson

Zhong-Qing Gong

Gang Ning

Vu Thanh Vo

Gemin Li

Tracey L Chavers

Kevin R Richardson

Sung Woo Yoo

Nelson J Kottke

Jose A Castillo

Tim P D'Angelo

Kevin B Jessop

Behzad Reyhani Masoleh

Chirag V Shah

A bracelet has a metal wrist piece in an arc of a user's wrist, T-bars implemented on opposite ends, each T-bar comprising a round bar of a length substantially the width of the body of the wrist piece, spaced apart from the body of the wrist piece by a T element, a first compound strap of flexible material with a through passage at one end in the direction of the width, a central slot opening into the passage, and a male snap element presented on a surface of the compound strap proximate an end of the strap opposite the through passage, and a second compound strap like the first but with a female snap element. The bars at the ends of the body of the wrist piece are inserted into the through passages through the slots into the through passages, joining the straps to the wrist piece on opposite sides.

Article of adornment with interchangeable parts

Methods and systems for producing circuitry using stackable passive components are discussed. More specifically, the present disclosure provides designs and fabrication methods for production of stackable devices that may be used as components in circuitry such as filters and impedance matching adaptors. Such components may be used to save space in printed circuit boards. Moreover, stackable passive components may be dual components, which may be improve the electrical performance in certain types of circuits such as matched component filters.

Stackable passive component

Multilayer ceramic capacitor structures may include structural arrangements, materials, and/or substrate modifications that can improve the reliability of the capacitor for long-term usage when faced with environmental stress. Embodiments may implement reduced entryways in the termination patterns of the capacitor to decrease damage potential due to exposure of moisture. Embodiments may implement structures that decrease interfaces with different physical characteristics, which may lead to a reduction in the formation of micro-fractures during regular usage. Methods of manufacture for the features that improve reliability are also detailed.

Reliable capacitor structures

Disclosed systems and methods relate to determining an intensity level of an exercise using a photoplethysmogram (PPG) sensor. A method of determining an intensity level of an exercise for a user according to one embodiment of the present disclosure includes detecting, by a device, body signals from the user using a PPG sensor. The method includes determining, by the device, a heart rate of the user based on the body signals. The method includes determining, by the device, an error in the heart rate. The method also includes determining, by the device, the intensity level of the exercise for the user based at least on the error.

Systems and methods for determining an intensity level of an exercise using photoplethysmogram (PPG)

Monolithic capacitor structures having a main capacitor and a vise capacitor are discussed. The vise capacitor provides to the monolithic capacitor structure reduced vibrations and/or acoustic noise due to piezoelectric effects. To that end, vise capacitor may cause piezoelectric deformations that compensate the deformations that are caused by the electrical signals in the main capacitor. Embodiments of these capacitor structures may have the main capacitor and the vise capacitor sharing portions of a rigid dielectric. Electrical circuitry that employs the vise capacitor to reduce noise and/or vibration in the monolithic capacitor structures is also described. Methods for fabrication of these capacitors are discussed as well.

Multilayer ceramic capacitor with low acoustic noise

Capacitor devices having multiple capacitors with similar nominal capacitances are described. The capacitors may be multilayer ceramic capacitors (MLCCs) and may be fabricated employing class 2 materials. The arrangement of the electrodes in the device may reduce relative variations between the capacitors of the device. The capacitor devices may be allow high performance and compact electrical circuits that may employ matched capacitors.

Matched ceramic capacitor structures

A printed circuit board (PCB) assembly having several electronic components mounted on a PCB and a damping layer covering the electronic components, is disclosed. Embodiments of the PCB assembly include an overmold layer constraining the damping layer against the PCB. Embodiments of the PCB assembly include an interposer between a capacitor of the electronic components and the PCB. Other embodiments are also described and claimed.

Printed circuit board assembly having a damping layer

Systems and methods described in this disclosure are related to fabrication and utilization of two-terminal electrical components that may have terminations with reduced width. Components, such as the ones described herein may be used to increase the density of components in electrical devices, as they may reduce a separation distance between devices that lead to solder bridging. Methods for fabrication are also described, including the use of ceramic layers that may provide reduction in parasitic capacitance and/or inductances.

Reduced electrical terminations in surface-mount technology components

Capacitor devices with electrodes that are geometrically arranged to reduce parasitic capacitances are described. The capacitors may be multilayer ceramic capacitor (MLCC) structures in which certain electrodes may have a clearance from a capacitor structure wall, such as top wall. In circuits and devices where that particular capacitor wall may be placed near a shielding structure, the clearance may reduce unintended parasitic capacitances between the shield structure and the electrodes. As a result, the shield structures may be placed closer to the electronic components, which may allow circuit boards and electronic devices with a lower profile.

Pseudo-shielded capacitor structures

A system includes a circuit board, an inductor including windings mounted on the circuit board, and a plurality of magnetic field containment devices. Each magnetic field containment device includes an independent electrical circuit that is not directly electrically connected via a conductor to any other magnetic field containment device. Each magnetic field containment device also includes a material of a certain relative permeability. Each magnetic field containment device at least partially surrounds the inductor and, in operation, at least partially contains a magnetic B-Field generated by electrical current in the windings of the inductor. The plurality of magnetic field containment devices, in operation, enables a certain saturation current in the inductor.

Magnetic field containment inductors

Methods and devices related to fabrication and utilization of multilayer capacitors presenting coaxially arranged electrode layers. The capacitors may be self-shielded against electromagnetic interference with neighboring components. The capacitors may have reduced losses from fringing effects when compared to conventional capacitors. The coaxial capacitors may be two-terminal multilayer ceramic capacitors (MLCC). The design of the capacitors may facilitate an improved relationship between the electric and magnetic fields generated by the capacitor within the dielectric in some embodiments. In some embodiments, the placement of the terminals may lead to a cancelation of mutual inductances between the electrodes. Terminations that facilitate the coupling of the capacitor to a circuit board, as well as methods for fabrication of the capacitors are also discussed.

Self shielding coaxial capacitor structures

This application relates to capacitors that resist deformation because of the configuration of their conductive and dielectric layers. The capacitors are multilayer capacitors that include multiple dielectric and conductive layers. The dielectric layers can be arranged in a way that creates a rigid barrier or dead zone, which can resist mechanical deformation when the multilayer capacitor is charged. In some embodiments, two or more multilayer capacitors are stacked together in an arrangement that causes each of the multilayer capacitors to cancel any deformations of the other when the multilayer capacitors are charged. In this way, noise exhibited by the multilayer capacitors can be reduced.

Capacitor structure with acoustic noise self-canceling characteristics

Methods and devices related to the design and fabrication of molded cores for printed circuit board assemblies and system-on-package (SIP) devices are discussed. The discussed printed circuit board assemblies may have multiple electrical components embedded in a molded core matrix and forming electrical connections with one or more printed circuit boards attached to the molded core matrix. Methods for sourcing of electrical components and production of the molded cores and printed circuit board assemblies are also discussed. The methods and devices may increase a volumetric density of electrical components in printed circuit board assemblies and provide improved mechanical properties to the electrical circuit device.

PCB assembly with molded matrix core

An electronic device may include surface mount technology components mounted to a printed circuit board. The surface mount technology components may include electrical components such as resistors, inductors, and capacitors. In order to reduce the size of the electronic device, surface mount technology components may be stacked. A surface mount technology component may be mounted to metal members that electrically connect the surface mount technology component to contact pads on a printed circuit board. A surface mount technology component may be provided with integral standoff portions, and a second surface mount technology component may be mounted to the integral standoff portions. A single surface mount technology component may be used to implement different circuits depending on which face of the surface mount technology component is mounted to the printed circuit board.

Growing community of inventors

Morgan Hill, CA, United States of America

Paul Aurelio Martinez