General Electric Company

Paul Andrew Frank

Donald Thomas McGrath

Daniel Arthur Staver

Daniel David Harrison

Robert Gideon Wodnicki

John Erik Hershey

Jerome Johnson Tiemann

Emad Andarawis Andarawis

Dale M Brown

Mario Ghezzo

Ernest Wayne Balch

Bruce F Griffing

Ahmad Nadeem Ishaque

Joseph M Pimbley

Kenneth J Polasko

Shankar Visranathan Guru

Douglas Ray Powell

Yoav Nissan-Cohen

An on-chip watchdog circuit ( ) is provided that generates an output signal ( ) when an error signal ( ) generated by a circuit under test ( ) is detected. The on-chip watchdog circuit ( ) comprises a logic gate ( ) that is connected to a clock signal and receives a signal in response to the error signal generated by the circuit under test ( ). A gate output circuit ( ) is connected to an output of the logic gate ( ). An RC circuit ( ) is connected to the gate output circuit ( ). A comparator ( ) is connected to the RC circuit ( ). The comparator ( ) is also connected to a voltage divider ( ) and provides the output signal ( ) in response to the error signal ( ) generated by the circuit under test ( ), and the on-chip watchdog circuit ( ) and the circuit under test ( ) are integrated on a same semiconductor microchip.

On-chip watchdog circuit

A circuit and method for achieving hold time compatibility between data-source devices coupled to a data-requesting device through a data bus is provided. The circuit is made up of an impedance coupled to the data bus, and the value of that impedance is selected, based on a respective capacitance in the data bus, to introduce a predetermined delay to data passing therethrough.

Circuit and method for achieving hold time compatability between data-source devices coupled to a data-requesting device through a data bus

An apparatus and method used to calibrate a gamma camera include an energy source and intensity selector and an energy weighting device. The energy source provides an energy output, such as an electrical current. The intensity selector is connected to the energy source and adjusts the energy output to a predetermined energy level that corresponds to an intensity of a predetermined radioactive source. The energy weighting device is also connected to the energy source and gamma camera, and the spatial compensator creates calibration signals from the energy output of the energy source. The calibration signals are supplied to the gamma camera and used during calibration of the gamma camera in lieu of energy signals produced by the gamma camera in response to a radioactive source.

Apparatus and method for calibrating gamma cameras

A circuit for determining connection status of a phone line shared by multiple telecommunications devices, such as modems and phones, is provided. The phone line includes respective tip and ring lines. The circuit comprises a first transistor stage coupled to receive a signal indicative of a voltage difference between the respective tip and ring lines. The first transistor stage is configured to supply an output signal having a predetermined time response. The circuit further comprises a second transistor stage coupled to the first transistor stage and configured to supply an output signal having a slow time response relative to the output signal from the first transistor stage.

Method and modem circuit for determining connection status of a phone line

The present invention provides a clocked comparator which extends the time period before an input signal is measured to include most of the clock cycle, thereby increasing the amount of time available for the input signal to achieve a &ldquo;steady-state&rdquo; condition. After the input signal achieves a &ldquo;steady-state&rdquo; condition the comparator compares the input signal against a reference voltage and a decision register latches the comparator output. The decision signal may then be further latched to be made available for external circuitry in the subsequent clock cycle. A multi-phase programmable signal generator is connected to the clocked generator for generating a plurality of timing signals. The multi-phase programmable signal generator employs a plurality of single bit registers interconnected in series to form a shift register. Output signals generated by the programmable signal generator are used to drive the switches and register clocks of the clocked comparator.

Multi-phase programmable clock generator

In embodiments of the present invention, an energy extractor includes a capacitor which experiences capacitance and voltage changes in response to movement of a capacitor plate or of a dielectric material. In one embodiment, a third plate is positioned between first and second plates to create two capacitors of varying capacitances. In another embodiment, one capacitor plate is attached by flexible arms which permit movement across another capacitor plate. The above capacitors can be used singularly or with one or more other capacitors and are rectified either individually or in a cascaded arrangement for supplying power to a rechargeable energy source. The above capacitors can be fabricated on a substrate along with supporting electronics such as diodes.

Integrated environmental energy extractor

The present invention provides a clocked comparator which extends the time period before an input signal is measured to include most of the clock cycle, thereby increasing the amount of time available for the input signal to achieve a 'steady-state' condition. After the input signal achieves a 'steady-state' condition the comparator compares the input signal against a reference voltage and a decision register latches the comparator output. The decision signal may then be further latched to be made available for external circuitry in the subsequent clock cycle. A multi-phase programmable signal generator is connected to the clocked generator for generating a plurality of timing signals. The multi-phase programmable signal generator employs a plurality of single bit registers interconnected in series to form a shift register. Output signals generated by the programmable signal generator are used to drive the switches and register clocks of the clocked comparator.

Apparatus and method for a high frequency clocked comparator and

A programmable clock circuit generates a plurality of phase clock signals in correspondence with an associated control word programmed into a memory. Programmable clock circuit is implemented digitally in an application specific integrated circuit. Each phase clock signal is synchronized by a master clock signal which reduces signal jitter and improves phase signal accuracy.

Digital programmable clock generator with improved accuracy

A delta sigma modulator having reduced quiescent power consumption as compared to known delta sigma modulators utilizes no operational amplifiers and includes, in one embodiment, an input CCD and a summing CCD coupled to the output of the input CCD. A readout is connected to receive output signals from the summing CCD. Both an integration/recirculation input CCD and a comparator are provided to receive output signals from the readout. The integration/recirculation input CCD feeds back a charge to the summing CCD, and the output of the comparator is connected to a fill and spill reference CCD, which also feeds back a charge to the summing CCD. The comparator output signal is an oversampled digitized version of the analog signal sampled by the input CCD. The comparator output signal is supplied to a low pass digital filter, and a decimator is connected to the output of the digital filter.

Delta-sigma analog-to-digital converter including charge coupled devices

A field-testable integrated circuit that includes a plurality of analog signal channels for receiving a respective analog signal during a normal mode of operation is provided. Individual test circuits are built-in within the integrated circuit for selecting respective ones of the plurality of channels to receive predetermined reference signals during a test mode of operation while uninterruptedly providing the normal mode of operation in any remaining unselected channels. Each test circuit includes a channel decoder responsive to predetermined channel select signals for producing a respective channel decoder output signal. A multiplexer is responsive to predetermined reference select signals and to the decoder output signal for supplying during the test mode of operation a selected one of the predetermined reference signals to the respective analog channel being coupled to the individual test circuit therein. A switching gate is responsive to the respective channel decoder output signal so that during the normal mode of operation the switching gate is in a respective conducting state for allowing the respective analog signal to pass therethrough while during the test mode of operation the switching gate is in a respective nonconductive state for interrupting the respective analog signal from passing therethrough.

Field-testable integrated circuit and method of testing

In order to solve the problem of the proximity effects which occurs in the fabrication of integrated circuit devices, a facile method is provided for automatically creating a new pattern in which variably spaced windage correction is applied over the mask. This permits the utilization of conventional design fabrication rules and systems without the concomitant problem of producing small feature sizes in isolated structures. The method produces highly desirable chip masks and is readily implemented on commercially available CAD systems presently being employed for the production of circuit masks. The method is automatic and extremely easily implemented.

Adjustable windage method and mask for correction of proximity effect in

A method is described for forming a desired pattern in a layer of polymethyl methacrylate resist formed on a substrate by irradiating the layer with a pattern of radiation substantially identical to the desired pattern and thereafter immersing the layer of polymethyl methacrylate in a solution of acetone to remove the irradiated portion of the layer of polymethyl methacrylate.

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Albany, NY, United States of America

Paul Andrew Frank