Terayon Communication Systems, Inc.

Terayon Communications Systems, Inc.

Trace Mountain Products, Inc.

Terayon Communicaion Systems, Inc.

Paul Alan Lind

Selim Shlomo Rakib

Michael Grimwood

Paul Richardson

Jim Knittel

Doug Artman

Yehuda Azenkot

Robert Fanfelle

Gerald L Pressman

James L Michelotti

Charles A Linquist

William D Van Alstyne

Russell Vogel

A pipelined digital data receiver for a cable TV headend which is capable of receiving DOCSIS 1.0 or 1.1 or advanced PHY TDMA or SCDMA bursts having programmable symbol rates and programmable modulation types as well as a host of other burst parameters such at Trellis code modulation on or off, scrambling on or off, various values for Reed-Solomon T number and codeword length. The receiver has an RF section to filter and digitize incoming RF signals. It also has an input section to detect impulse noise and do match filtering and despread SCDMA bursts. A timing recovery section recovers the symbol clock and detects the start of bursts and collisions. A rotational amplifier and equalizer calculate and track gain, phase and frequency offsets and correct symbols and calculates equalization coefficients. A decoder section decodes TCM and non TCM bursts, and a Reed-Solomon decoder section reconstructs RS codewords and uses them to error correct the payload data.

Head end receiver for digital data delivery systems using mixed mode SCDMA and TDMA multiplexing

Method and apparatus to carry out wideband DOCSIS both upstream and downstream in a point-to-multipoint environment of an HFC system using port trunking concepts. For the downstream, each CMTS has a frame distributor which distributes frames to various transmitters transmitting on downstream channels to be used to transmit downstream data simultaneously to a CM using wideband DOCSIS. The frame distributor adds sequence numbers in some embodiments to guarantee proper order of frames can be restored at the CM, and schedules transmissions according to quality of service considerations to meet guaranteed and committed portions of constant bit rate and variable bit rate flows. The CMTS sends and Extended Channel Enable (ECE) message to wideband capable CMs telling them which downstreams to enable. Each CM has a frame collector to which all frames received on various downstream channels are sent. The frame collector makes sure they are all there, puts them into the proper order and delivers them to a NI. Upstream wideband DOCSIS works the same way with a frame distributor in each CM and a frame collector in the CMTS. The CMTS receives bandwidth requests and controls upstream wideband DOCSIS transmissions by sending downstream UCD and MAP and ECE messages to the CMs instructing them which upstream channels to use, describing the parameters of the channel and assigning times for transmission which are simultaneous on multiple channels for upstream wideband capable CMs.

Wideband DOCSIS on catv systems using port-trunking

A method for allowing upstream channels having the same multiplexing type but different symbol rates or the same symbol rates but different multiplexing types to be transmitted on the same frequency band without interfering with each other. In particular, a method for allowing DOCSIS 1.0 TDMA only cable modems to coexist on a digital data delivery distributed system with advanced PHY TDMA or SCDMA mode cable modems without the need for modification of the DOCSIS 1.0 cable modems or the need for the DOCSIS 1.0 modems to transmit on a different frequency. The method comprises: using a plurality of upstream channel descriptor messages transmitted from said central modem to said distributed modems to define a plurality of different upstream logical channels sharing the same frequency band, each said logical channel having either a different symbol rate but the same multiplexing type or the same multiplexing type but a different symbol rate, said upstream channel descriptor messages assigning each of said distributed modems to logical channels appropriate to the symbol rate and modulation type of said distributed modem; and, scheduling transmission bursts on each said logical channel by transmitting a bandwidth award and scheduling message for each logical channel each of which defines and controls which distributed modems on the logical channel to which the bandwidth award and scheduling message can transmit and when they can transmit, said bandwidth award and scheduling messages being coordinated by said central modem so that there is never any overlap in time between transmission bursts on different logical channels sharing the same frequency band.

Mixed DOCSIS 1.0 TDMA bursts with SCDMA transmissions on the same frequency channel

A bidirectional digital data communication system which generate phase coherent upstream clock and carrier signals from recovered downstream clock generated from a master clock in a central unit. The preferred species uses any downstream clock rate and generates a phase coherent upstream clock so long as the two clock rates can be related by the ratio M/N where M and N are integers. One embodiment uses an MCNS downstream and an SCDMA upstream and uses MNCN timestamp messages in the downstream to achieve an estimate of RU frame offset prior to establishing frame alignment using a ranging process. The use of timestamp messages to estimate the offset is aided by a low jitter method for inserting timestamp messages by avoiding straddling of MPEG packet headers with the sync message. Clock slip is detected by counting upstream clock cycles over a predetermined downstream clock interval and the RU transmitter is shut down if slip is detected to prevent ISI interference from misaligned codes. An SCDMA transmitter for the minislot environment of 802.14 and MCNS is disclosed along with a receiver for the minislot environment using TDMA or SCDMA demultiplexing.

Apparatus and method for synchronizing an SCDMA upstream or any other type upstream to an MCNS downstream or any other type downstream with a different clock rate than the upstream

In a magnetic recording system, an asymmetry detector reverses the phase of a read, single-frequency test signal to indicate to a micro-controller whether recording signal asymmetry is present. Upon detecting such asymmetry, the micro-controller causes a current source coupled to the recording head to adjust a write current to correct the timing of a written data signal.

Method and apparatus for adjusting asymmetric recording signals

Growing community of inventors

Santa Cruz, CA, United States of America

Paul Alan Lind