International Business Machines Corporation

Patrick Sicsic

Patrick Michel

Lionel Denecheau

Denis Esteve

Jean-Francois Le Pennec

Alain Benayoun

Marc Lamberton

Jean-Francois LePennec

Jean-Louis Clara

Rene Chuniaud

Didier Avargues

Henri Giuliano

Joseph Spatari

Jean-marc Cazaentre

Alain Brun

A node within a network comprising a transport layer protocol for multicasting datagrams on a virtual ring. Each node on the virtual ring is logically connected to two neighbour nodes through virtual connections. A virtual ring datagram is sent to a downstream neighbour node on the virtual ring and a token is received. The virtual ring is identified and the token is forwarded to the downstream neighbour node. If the received datagram is a virtual ring datagram, the virtual ring is identified and the node originator of the received virtual ring datagram is checked. If the received virtual ring datagram has not been locally originated, data in the virtual ring datagram is processed and the virtual ring datagram is forwarded to the downstream neighbour node on the virtual ring. If the received virtual ring datagram has been locally originated, the virtual ring datagram is removed from the virtual ring.

System and method for communicating on a virtual ring in an internet protocol network

A method of bandwidth management enabling to insure a guaranteed bandwidth to each station of transmission network comprising a plurality of stations () forming a logical ring wherein a token frame is circulating from station to station, each station being allowed to transmit a credit (c) of data bytes upon reception of the token frame wherein the credit is increased in proportion to a variable TRTT standing for Token Round Trip Time which is the time taken for the token frame to circulate around the logical ring since the preceding reception of the token frame by the station. The credit is increased in proportion of a variable CIR standing for Committed Information Rate which is the guaranteed transmission rate that the station can use to transmit data wherein the value of CIR is determined by a class of bandwidth which has been previously selected by the station upon the preceding reception of the token frame by the station.

Method of allocating bandwidth on request to the stations of a local area network

A method of bandwidth management for ensuring a guaranteed bandwidth to each station of a transmission network () comprising a plurality of stations (), forming a logical ring wherein one of the stations is the ring manager and wherein a token frame is circulating along the logical ring from station to station, each station being allowed to transmit data to other stations over the transmission network when it receives the token frame while holding the token during the time the station is transmitting data. A credit of data bytes allowed to be transmitted is allocated to each station upon reception of the token frame when an Utilization Rate based upon the number of data bytes sent by all stations since the preceding reception of the token frame is greater than a predetermined threshold.

Method of bandwidth management between the stations of a local area network

A method of bandwidth management over a transmission network comprising a plurality of stations forming a logical ring that circulates a token from station to station. Each station is allowed to transmit data to other stations over the transmission network when it receives the token. The station is allowed to transmit C bytes, where C is a credit. The credit increases in proportion to the time spent since the preceding reception of the token by the station.

Method of allocating bandwidth to the stations of a local area network

A collision-free protocol for transmitting frames between stations connected over a shared transmission medium such as an IEEE 802.3 Ethernet LAN. A logical ring is formed and a token is circulated among the connected stations part of the logical ring (not all connected stations are required to be part of the logical ring). Transmitting from any one station, part of the logical ring, is permitted only while holding the token, therefore preventing collisions. A collision-free protocol, over a standard Ethernet infrastructure, becomes feasible, yet remains compatible with the standard collision protocol, thus improving performances.

System and method for enabling a collision-free protocol over ethernet

An adapter for transferring blocks of data of a variable size to at least one destination adapter, each of the adapters being plugged in a respective slot and connected to a main system bus which is controlled by a central backplane card. In each adapter, the transmission of one block of data is provided, in part, by a device, operative in response to the detection of an ACK acknowledge word giving access to the bus, for generating a signalling word to be transmitted to a particular destination adapter which will actually receive the transmitted data; the signalling word comprising information characterizing the type of command which the transmitting adapter sends as a request to the backplane card, the address of the particular adapter which will receive the transmitted data, the size of the block of the transmitted data and the address of the transmitting adapter. The adapter is best suited for use in multimedia systems where variable size data blocks are required to transmit data, voice, video, etc.

adapter for transferring blocks of data having a variable size to other

A conversion cache circuit, interfacing RISC busses to CISC peripheral circuits, provides master/slave Write and Read operations in a shared memory (130) and in the internal registers of the processor of said peripheral circuits (210). It enables RISC processor to Write and Read in the internal registers of the 8-bit processor in a salve operation while the 32-bit processor may perform the Write or Read operations to the shared memory through the conversion cache circuit in a master mode. The 32-bit processor may have access directly to the memory through its own direct access memory mechanism.

System and method for interfacing risc busses to peripheral circuits

A method for initializing ISDN adapter cards installed within a workstation having a main processor and an ISDN primary adapter for connecting the ISDN adapter cards to an ISDN primary gateway. Each ISDN adapter card has circuits for handling at least one B-channel, and a first processor associated with memory storage. The ISDN primary adapter includes a second processor associated with a second memory storage. In response to the reception of a specific polling pattern transmitted to each adapter card by the primary adapter, a pattern is transmitted to the workstation processor for requesting the loading of the second memory storage with operational code transferred from the workstation to the ISDN adapter card. The ISDN primary adapter, in response to the request pattern received by the main processor, transmits a second pattern via the ISDN adapter card that transmitted the first pattern, so that the main processor in the workstation and the processor in the ISDN primary adapter recognize the ISDN adapter card that transmitted the patterns to the workstation and to the ISDN primary adapter as the master ISDN adapter card for transmission of control information on the D-channel.

Method and apparatus for initializing ISDN adapter cards in a

Method for transmitting a unique high-rate digital data flow over n multiple different independent digital communication channels between two different primary terminal adapters. The method involves the steps of establishing, on request of a first DTE to a second remote DTE, a set of n independent digital communication channels between said terminal adapters and determining, during an initialization phase, the relationship between the slot of each channel used for the building of an aggregation superchannel and the chronologic order of the establishment of the considered slot. Then, the high-rate digital data flow is separated into bytes and each byte is transmitted through the independent digital channels in accordance with the chronologic order which was previously assigned to each of the said channels. In the remote DTE, each byte of the separated high-rate data flow is received through the different independent digital channel and is loaded in a single memory at an address which is computed from the following formula:

Method and apparatus for transmitting an unique high rate digital data

An adapter having a line interface circuit for providing an analog attachment to a network (100). The line interface circuit is provided with a reset input for beginning a resynchronization of the timing of the adapter. The adapter further includes a Digital Phase-locked Loop device DPLL (203) driven by a master clock (306) which provides the timing and synchronization signals to the line interface circuits (201). The DPLL (203) divides a master clock down to an internal INT clock (309), a phase comparator (303) compares the INT clock with a reference signal (302) which is synchronized with the receive clock (202) extracted from the line by line interface (201). The phase comparison process operates with a Correction Signal (CS) which has a window centered around the falling edge of the INT clock. A frequency correction is initiated when the reference clock falls outside of the correction window and is achieved by inserting or suppressing a master clock pulse at this time. The adapter further includes means for resetting the line interface circuits and the DPLL at the power-on of the adapter, such that the frequency correction apparatus of the adapter causes two adapters attached at separate ends of a transmission medium to evolve toward stable timing states with respect to each other.

Adapter for the connection to a clear-channel telecommunication network

An apparatus for connecting a data communication equipment, such as a data terminating equipment (DTE) to an ISDN digital communication network providing a first 64 kbps and a second 64 kbps B digital communication channel which involve different transmission delays. The apparatus includes a transmit part with a separation for separating a unique high rate 128 kbps data flow into two distinctive 64 kbps data flows to be transmitted through both B channels. The apparatus includes a receive part (9999) including storage for storing the data received from digital network, measurement and comparison circuits for measuring the difference between the two transmission delays, address generators for addressing the storage in order to extract the data received through both digital channels, control circuits responsive to the measure and comparison for controlling the address generators in order to provide a 128 kbps which is not affected by the difference of transmission delays introduced by both digital channels. The invention is particularly well suited for transmitting simultaneously multi-media data, i.e. voice, video and data.

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La Colle sur Loup, France

Patrick Sicsic