Compaq Computer Corporation, Inc.

Litton Resources Systems, Inc.

Patrick R Cooper

Randall L Hess

Hung Q Le

William Caldwell Crosswy

Steven C Malisewski

Ted H Clark

Larry J Crochet

Joseph F Freiman

Armando Interiano

Daniel B Reents

Mark S Tracy

Minh H Nguyen

William C Hallowell

Drew S Johnson

David J Delisle

Gaines C Teague

Philip James McKenzie

Donald G Scharnberg

Curtis L Progl

James H Garrett

Ronald B Higgins

Juan B Vallhonrat

Paul M Perry

John Vivian

John A Harlan

Donald P Golden, Jr

A handheld computer which contains an LCD display having a digitizing surface to allow pen input. Internal storage takes several forms, such as a large flash ROM area, battery-backed up RAM and an optional hard disk drive. Several alternative communication paths are available, such as the previously mentioned modem, a parallel printer port, a conventional serial port, a cradle assembly connected to the host computer, and various wireless short distance techniques such as radio frequency or infrared transmission. The computer can readily communicate with other sources, particularly to a host desktop computer, to allow automated synchronization of information between the host and the handheld system. Preferably the remote synchronization is performed at several user selectable levels. When the handheld computer is in a cradle and actively connected to the host computer, automatic capture of updated data in the host computer is performed. Several synchronization techniques are utilized to keep track of different types of files. In addition, while communication is established the handheld computer can enter a remote control mode, allowing the user access to files and applications not included in the handheld computer.

System for automatic synchronization of common file between portable computer and host computer via communication channel established with user approval of charge to be incurred

A thermal management controller to regulate the operating temperature of high speed, high circuit density semiconductor dice in an electronic product. The thermal management controller monitors the temperature of a heat sink in thermal contact with the high speed, high circuit density semiconductor dice and also monitors the operational status of one or more specified devices which may increase the heat load within the electronic product. As the temperature of the heat sink increases and/or as specified devices increase the heat load in the electronic product, the thermal management controller will start cooling fans and/or increases the speed of the cooling fans to increase heat removal from the electronic product by forced convection. As the temperature of the heat sink decreases and/or as specified devices cease contributing to the heat load in the electronic product, the thermal management controller will decrease the speed of the cooling fans and/or turn off the cooling fans to decrease heat removal from the electronic product. If the temperature of the heat sink rises above a predetermined temperature, the thermal management structure will reduce the clock speed of the semiconductor dice. If the temperature of the heat sink rises above a predetermined maximum temperature, the thermal management structure will turn of the semiconductor dice.

Apparatus, method and system for thermal management of an electronic

System for automatic synchronization of common file between portable

In accordance with the invention, a computer system is provided with a flash read-only-memory (ROM), a microcontroller and a data port. The microcontroller initially owns the flash ROM. The microcontroller further has a separate ROM upon which it can execute boot-up instructions. After booting up, the microcontroller checks the flash ROM contents, preferably by performing a check-sum of the flash ROM contents. If the checksum of the flash ROM contents matches an expected value, the microcontroller releases ownership of the flash ROM to the computer system so that the computer system boots-up as normal. If the microcontroller determines that the flash ROM has become corrupted, the microcontroller accesses the data port and looks for a flash programming protocol. If the protocol is present at the data port, the microcontroller receives the data from the data port and programs the flash ROM accordingly. In this manner, the flash ROM can be updated to a good known state, even if the computer system is not able to boot up due to, among other things, the corruption of the flash ROM.

Computer system and method for replacing obsolete or corrupt boot code

A controller circuit that controls the transfer of a computer operating system from a host computer into a hand-held computer system through the parallel port without the need of intervention from the microprocessor. The operating system is loaded into flash memory devices located in the hand-held computer. The protocol used for the transfer is the IEEE 1284 bi-directional parallel port specification. To begin the transfer of data, the host computer performs a negotiation according to the 1284 standard with the hand-held computer. After the host computer has determined that the hand-held computer is 1284 compliant, it embeds two flash command bytes to indicate the type of command to be performed, selects the desired banks of flash memory, and selects the block in the flash memory. The commands that are performed include a write, a read array, a block erase, a read ID, a read status register, a clear status register, and a parallel port disable command. The controller circuit performs handshaking functions through the parallel port with the host computer, and it seizes control of the system data bus when a transfer is desired.

Programming memory devices through the parallel port of a computer system

A computer system which utilizes a CMOS memory/RTC and does not have a separate battery for powering the CMOS memory/RTC. A serial EEPROM is utilized to maintain the contents of the CMOS memory. When the computer is entered into a setup mode and the CMOS information is to be saved, it is saved to both the CMOS memory and to the serial EEPROM. Upon booting up, a check is made to see if the CMOS memory has not lost data. If it has, then the copy stored in the serial EEPROM is retrieved and utilized. In a second embodiment, a flash EEPROM used to store the BIOS of the computer also stores this information. The flash EEPROM is a type where the EEPROM is divided into several partitions and each can be programmed independently of the others. The partition of the flash EEPROM used for the CMOS information is originally erased. The partition is sufficiently large to contain numerous copies of the CMOS data. Copies of the CMOS data are sequentially stored. If the partition should become filled up, then an erase cycle is performed and the CMOS data is written as the first copy. If upon booting the computer indicates that the CMOS memory is not trustworthy, then the partition is scanned until erased state of data is obtained, at which time the pointer is decremented to obtain the last copy of the stored CMOS data and this is restored for operation.

Personal computer with CMOS memory not having a separate battery

A liquid crystal display (LCD) panel which has its contrast controlled through the use of a pulse width modulation (PWM) circuit contained in the video controller and a contrast control circuit. In response to a particular video refresh mode, the PWM circuit modulates the pulse width of a signal that is an input to the contrast control circuit. The pulse width is changed by the use of a base contrast register and two offset registers. Depending on the video mode, the base register is used alone or is combined with one of the offset registers to provide a signal to indicate the duty cycle of the signal. The pulse width modulated signal is converted to a DC bias contrast voltage which is provided to the LCD panel.

Circuit for controlling bias voltage used to regulate contrast in a

A computer system with a digitizer based screen display in which the digitizer data is buffered through a first-in first-out memory (FIFO). The processor is only interrupted when a full digitizer data packet is available in the FIFO, rather than being interrupted on each data byte available in the FIFO. The FIFO can hold multiple digitizer data packets, so that data is not lost should the processor in the computer system be unable to immediately handle these digitizer data packets. The system also provides a filter in a separate controller that examines each digitizer data packet to determine if the pen is in a predefined screen location that performs a prespecified function. If so, rather than pass the digitizer data packet to the system processor through the FIFO, the command is passed through a separate register to the processor based on the 'hotspot' touched on the screen.

Buffering digitizer data in a first-in first-out memory

A circuit for connecting the power supply output of a computer to ground when the system is shut down to counter adverse effects of backfeed voltage which includes a MOSFET between the power supply output and ground. In one embodiment the MOSFET is switched on by a signal that deactivates the system power supply. In an alternative embodiment, two MOSFETs are used. The first MOSFET is controlled directly by the power supply output and shorts the second MOSFET's gate to ground when the power supply output generates a significant voltage. If the second MOSFET's gate is grounded, the MOSFET deactivates and opens a circuit between the power supply output and ground. When the power supply is turned off, the second MOSFET activates and grounds the power supply output. A resistor between the power supply output and ground allows the power supply to generate five volts when the system is power cycled and deactivate the second MOSFET.

Circuit for clamping power output to ground while the computer is

A battery charge controller and fuel gauge which accurately monitors the voltage, temperature, and charge and discharge current of a rechargeable battery, and calculates the battery's charge capacity and charge level. Each time the battery is fully discharged, any calculated charge level remaining is divided by two and subtracted from the previously calculated charge capacity. When the battery is fully charged, the charge level is set equal to the charge capacity. During subsequent charge and discharge, the current is converted to a coulomb count and added or subtracted from the charge level to maintain an accurate charge level. Fast charge inefficiency due to temperature is considered by subtracting a temperature proportional factor before the charge level of the battery is updated. The charge level, voltage and temperature are used to determine the optimal fast charge termination point to achieve full charge and prevent temperature abuse and overcharge. A fast charge is applied only if the battery is within proper voltage and temperature ranges. The charge controller includes a microcontroller circuit within the same battery pack as the battery, which is powered by the battery when AC power is unavailable. The microcontroller circuit consumes very little power, measures circuit errors to assure data accuracy, times periods of self-discharge and updates the charge level accordingly. The microcontroller circuit also includes memory to store the battery charge information and a communication port to provide the charge information to a computer system connected to the battery pack.

Battery charge monitor and fuel gauge

A battery charge controller and fuel gauge which accurately monitors the voltage, temperature, and charge and discharge current of a rechargeable battery, and calculates the battery's charge capacity and charge level. Each time the battery is fully discharged, any calculated charge level remaining is divided by subtracted from the previously calculated charge capacity. When the battery is fully charged, the charge level is set equal to the charge capacity. During subsequent charge and discharge, the current is converted to a coulomb count and added or subtracted from the charge level to maintain an accurate charge level. Fast charge inefficiency due to temperature is considered by subtracting a temperature proportional factor before the charge level of the battery is updated. The charge level, voltage and temperature are used to determine the optimal fast charge termination point to achieve full charge and prevent temperature abuse and overcharge. A fast charge is applied only if the battery is within proper voltage and temperature ranges. The charge controller includes a microcontroller circuit within the same battery pack as the battery, which is powered by the battery when AC power is unavailable. The microcontroller circuit consumes very little power, measures circuit errors to assure data accuracy, times periods of self-discharge and updates the charge level accordingly. The microcontroller circuit also includes memory to store the battery charge information and a communication port to provide the charge information to a computer system connected to the battery pack.

Battery charge monitor to determine fast charge termination

A data processing system having an architecture that will allow high-speed direct device-to-device data transfers without the necessity of first detouring the data through a computer memory. The system consists of a host computer and a remote signal processing subsystem connected thereto. A Direct Device Access Bus and a plurality of data processing devices are provided. A controller associated with a Signal Processing Subsystem supervisor, selectively interconnects desired ones of a set of data processing devices via the Direct Device Access Bus to provide direct communication between the selected devices within a set. Several sets of devices can be serviced concurrently by the technique of dynamic time slot allocation.

Growing community of inventors

Houston, TX, United States of America

Patrick R Cooper