Linear Technology Corporation

Patrick Philip Copley

William C Rempfer

James Lee Brubaker

A network comprises an arrangement of regular structures and merged structures, in which the regular structures each comprise one or more mutually identical fixed elements and an equal number of adjustable elements of equal value, and the adjustable elements each comprising two or more adjustable units. The regular structures may comprise one or more mutually identical fixed elements and an equal number of adjustable elements of equal value. The adjustable elements each comprise two or more adjustable units, and the merged structures comprise N mutually identical fixed elements and one merged adjustable element. The merged adjustable elements have substantially the same value as that of N adjustable elements, where N is an integer equal to or greater than 2, and the merged elements each may comprise one or more adjustable units. The network accordingly is trimmable in a manner that uses minimum area and consumes minimum time during manufacture. A described application is in digital-to-analog converter trim circuitry.

Network with multiple adjustment elements and sensitivities, and digital-to-analog converter implementing same

An improved digital-to-analog converter comprises a reference node, switches providing an input digital signal, and an output stage including at least one resistive element. A resistance ladder, coupled to the switches, includes branches corresponding respectively to bit positions, in which selective operation of the switches in response to the input digital signal produces a corresponding analog output signal from the output stage. The ladder includes a first trim structure coupled to the most significant bit position (MSB) and a second trim structure in the output stage resistive element or elements. The first trim structure is configured to adjust the gain of the converter without affecting the relative bit weights of the bit positions, and wherein the resistances of the first and second trim structures are substantially of a prescribed ratio prior to any trimming.

Trim circuits and methodologies for data converters

A signal processor circuit that buffers a ground-referred, signal-dependent, current. A ground-referred node in the circuit is preferably maintained at a ground level. The ground-referred, signal-dependent, current is preferably buffered such that the ground-referred node is preferably maintained at a ground level independent of changes to the ground-referred, signal-dependent, current.

Circuits, systems, and methods for signal processors that buffer a signal dependent current

A signal processor circuit which receives an input signal and two control words and is programmable to vary the level and the output voltage range of the output signal is provided. The signal processor includes a converter circuit and a level circuit which provide the output circuit with intermediate signals based on input control signals, e.g., input digital words. The output circuit receives an additional control signal and the intermediate signals and is programmable to modify the output voltage range and level of the output signal based on the additional control signal, e.g., a digital word.

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Sunnyvale, CA, United States of America

Patrick Philip Copley