Lsi Logic Corporation

Patrick O'Brien

Brian J Lynch

Adrian S Murphy

An interconnect bump is formed on a substrate structure of a flip-chip microelectronic integrated circuit by sputtering a metal base layer on the substrate, and then forming a copper standoff on the base layer. A solder cap is formed on the standoff having a peripheral portion that extends laterally external of the standoff. The peripheral portion of the cap is used as a self-aligned mask for a photolithographic step that results in removing the metal base layer except under the standoff and the cap. The cap has a lower melting point than the standoff. Heat is applied that is sufficient to cause the cap to melt over and coat the standoff and insufficient to cause the standoff to melt. The peripheral portions of the cap and the base layer that extend laterally external of the standoff cause the melted solder to form into a generally hourglass shape over the standoff due to surface tension.

Interconnect bump for flip-chip integrated circuit including integral

A process where in an interconnect bump is formed on a substrate structure of a flip-chip microelectronic integrated circuit by sputtering a metal base layer on the substrate, and then forming a copper standoff on the base layer. A solder cap is formed on the standoff having a peripheral portion that extends laterally external of the standoff. The peripheral portion of the cap is used as a self-aligned mask for a photolithographic step that results in removing the metal base layer except under the standoff and the cap. The cap has a lower melting point than the standoff. Heat is applied that is sufficient to cause the cap to melt over and coat the standoff and insufficient to cause the standoff to melt. The peripheral portions of the cap and the base layer that extend laterally external of the standoff cause the melted solder to form into a generally hourglass shape over the standoff due to surface tension.

Process for manufacturing an interconnect bump for flip-chip integrated

Process for making an interconnect bump for flip-chip integrated circuit

Industry-standard COT/TAB integrated circuit part carrier frame members are receivable into a shipping tube member in a stack which rests at one end on paired retaining pins and at the other end is retained by a closure member of the shipping tube. As so disposed in the shipping tube, the carrier frames are securely held with virtually no risk that they will slip out of place within the shipping tube. The shipping tube member includes side walls which define plural pairs of apertures spaced along the length of the shipping tube so that: the paired pins may be relocated to adapt the shipping tube to various shipment sizes. The remainder of the shipping tube remains empty to reduce both the cost of carrier frames conventionally used just as filler, as well as reducing shipping costs by eliminating the weight of these filler carrier frames which are shipped empty.

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Palo Alto, CA, United States of America

Patrick O'Brien