Motorola Corporation

Freescale Semiconductor,inc.

Patrick Lee Rakers

Timothy J Collins

Douglas Alan Garrity

Pallab Midya

Lawrence Edwin Connell

Poojan Wagh

Matthew Richard Miller

Richard Stanley Rachwalski

William J Roeckner

Michael Lee Bushman

Omid Oliaei

Donald B Lemersal, Jr

David P Gurney

Stephen Leigh Kuffner

Steven F Gillig

Victor Allen Vega

Neal W Hollenbeck

Joseph F Wodka

James Gerard Quaderer

Daniel A Mavencamp

Mark Paul Lill

Bradley C Stewart

Michael Joseph Crowley

Yan Cui

Jason H Branch

Miles Randall Jackson

Daniel J Russell

Sam Joseph DiRaimondo

Dwight D Griffin

Giuseppe Mario Diprizio

Christopher P Lash

Andrea Eberhardt

A source device () receives a carrier signal and continuously monitors the carrier signal for a first predetermined condition and a second predetermined condition. The source device () transmits data if the first predetermined condition is satisfied. The source device () ceases transmission of data if the first predetermined condition subsequently is not satisfied or if a second predetermined condition is satisfied.

Method and device for enabling and disabling group transmissions

A direct digital synthesis circuit () includes a plurality of current sources (), an output circuit (), and a logical multiplier circuit (). The output circuit () provides a synthesized waveform () output and includes a first () and second branch (). The logical multiplier circuit () is operatively coupled to the plurality of current sources () and to the output circuit (). The logical multiplier circuit () is operative to receive a plurality of signals. The logical multiplier circuit is also operative to selectively increase a first current flow through the first branch () by a determined magnitude and decrease a second current flow through the second branch () by the determined magnitude based on the plurality of signals. The synthesized waveform () is based on the first and second currents.

Direct digital synthesis circuit

Methods and corresponding systems in a low noise amplifier include selecting a selected sub-band for amplifying, wherein the selected sub-band is one of a plurality of sub-bands, wherein each sub-band is a portion of a frequency band, and wherein each sub-band has a corresponding sub-band center frequency. Next, a gate-source capacitor is adjusted so that a real part of an LNA input impedance corresponds to a real part of a source impedance at the selected sub-band center frequency. A match capacitor is also adjusted so that the LNA input impedance corresponds to the complex conjugate of the source impedance at the selected sub-band center frequency. The gate-source capacitor and the match capacitor can each be adjusted by recalling capacitor values from memory that correspond to the selected sub-band, and connecting selected capacitor components in response to the recalled capacitor values.

Low-noise amplifier

A closed loop audio amplifier system and method of powering up/down the system without producing audible artifacts are provided. During power up, a prebias voltage is provided to each output connected to a speaker to increase the voltage to a nominal output level. High impedance switches are then driven at a 50% duty cycle. Feedback from the output is supplied to a servo, which is enabled to fine tune the output voltage. Low impedance switches are then driven at a 50% duty cycle at a quarter cycle timing. The order of the feedback loop depends on which of the high or low impedance switches are driven. The prebias voltage is then removed before audio signals to be amplified are supplied to the system. Timing of driving of the switches is programmable. To power down, essentially the reverse sequence is provided.

Quiet power up and power down of a digital audio amplifier

Method and apparatus are provided for high linearity and low noise communication signal mixing. The apparatus includes a high linearity low noise mixer having an input stage coupled to a switch stage by a series-coupled blocking capacitance and input resistance. The input stage includes a buffer with negative feedback, and the switch stage includes a transistor based switch network connected to an amplifier that has feedback resistance and shunting capacitance. The method includes AC coupling an RF signal, increasing a gain of the RF signal, reducing third-order distortion by negatively feeding-back the RF signal, blocking IM2 generated from said gain increasing step, increasing a second-order input intercept point (IIP2) by attenuating the RF signal across a resistance, and applying a local oscillator input to the RF signal.

High linearity and low noise CMOS mixer and signal mixing method

A radio frequency identification system comprising a radio reader circuit operable to emit a radio frequency carrier signal modulated with a subcarrier, which has a subcarrier modulation rate. The radio frequency identification tag circuit is operable to extract the subcarrier from the emitted radio frequency carrier signal and the extracted subcarrier then functions as a clock, which operates to assist in the transfer of a modulated backscattered signal to the radio frequency identification reader circuit. The radio frequency identification reader circuit decodes the modulated backscattered signal and the data encoded in the radio frequency identification tag circuit is obtained.

Use of a subcarrier in an organic semiconductor radio frequency identification system

A radio frequency identification ('RFID') device () having stored thereon an expiration and a set of data bits which, when presented to a processing device () via a RFID reader (), causes the processing device () to enable a feature that would otherwise be disabled in an electronic device (), and disable the feature when the expiration reaches a predetermined value.

Enabling/enhancing a feature of an electronic device using radio frequency identification technology

A system and method for analog-to-digital conversion using digital pulse width modulation (PWM) is disclosed. The method and system according to the disclosed invention converts an analog input signal to a digital signal in pulse code modulated (PCM) form. The disclosed invention uses a feedback circuit to perform PWM of the analog input signal. The PWM signal is then decimated to obtain the digital signal in PCM form. The system according to the disclosed invention requires lower operating frequency and dissipates lesser power than prior art systems providing the same sampling frequency and resolution. The operation at a lower frequency is achieved by obtaining two samples from every pulse of the PWM signal; the first sample being obtained from the right duty ratio, and the second sample being obtained form the left duty ratio. Further, the disclosed invention has lesser implementation complexity and higher signal-to-noise ratio than prior art.

Method and system for analog to digital conversion using digital pulse width modulation (PWM)

An architecture for a computer system that has lower complexity than prior computer system architectures. In one embodiment the functionality that in prior computer system architectures resides in a central processing unit (CPU) is split between a CPU and a program control unit. This allows the CPU to have lower complexity and can permit the computer system to have greater flexibility and lower cost. In another embodiment the computer system contains a memory mapping unit. The memory mapping unit enables the computer system to use one of a plurality of peripherals without changing the instruction codes of the CPU thus increasing the flexibility of the computer system.

Reduced complexity computer system architecture

In accordance with the present invention, a radio frequency identification (RFID) device comprises a plurality of data fields. The RFID device transmits a data symbol from a data field, receives an acknowledgement symbol, and compares the transmitted data symbol to the received acknowledgement symbol. The RFID device repeats these steps until data transmission is complete as long as each transmitted data symbol is equivalent to a corresponding received acknowledgement symbol; otherwise, the RFID device maintains the data field from which the last data symbol was transmitted, and temporarily suspends data transmission. When the RFID receives a request for RFID devices temporarily suspended in a given data field to resume data transmission, if the given data field in the request is equivalent to the data field that was maintained, the RFID device repeats the steps above starting with the first symbol in the data field that was maintained.

Method of communication in a radio frequency identification system

Systems and methods are described for a continuous-time sigma-delta modulator with discrete time common-mode feedback. The method includes calculating an integrator input signal as a difference between an input signal and a modulation feedback signal, continuous time integrating the integrator input signal to produce an integrator output signal having a common mode voltage, determining the common mode voltage of the integrator output signal using a discrete-time process, determining an integrator feedback signal as a function of the common-mode voltage and feeding back the feedback signal to the integrator in order to maintain the common mode voltage at a substantially constant value, sampling and quantizing the integrator output signal to produce a sigma-delta modulated output signal and converting the sigma-delta modulated output signal from a digital signal to an analog signal, to produce the modulation feedback signal.

Continuous-time sigma-delta modulator with discrete time common-mode feedback

Systems and methods are described for a digital tuning scheme for continuous-time sigma-delta modulation. The method includes integrating a voltage from a voltage source using a discrete-time integrator to produce a discrete-time integrator output, continuous-time integrating a current from a controllable current source to produce a continuous-time integrator output, quantizing the difference between the continuous-time integrator output and the discrete-time integrator output to produce a quantizer output, controlling a polarity of the controllable current source with the quantizer output, counting the quantizer output to produce a feedback signal, and tuning the controllable current source as a function of the feedback signal.

Digital tuning scheme for continuous-time sigma delta modulation

Embodiments of the present invention deal generally with circuitry and methods for converting a sampled digital signal ( ) to a naturally sampled digital signal ( ). One embodiment relating to a method includes receiving the sampled digital signal, calculating a duty ratio estimate ( ) using feedback ( ), and using interpolation ( ) to determine the naturally sampled digital signal. Circuitry for converting a sampled digital signal ( ) to a naturally sampled digital signal ( ) includes a natural sampler, where the natural sampler includes an input to receive the sampled digital signal ( ) and an input to receive a feedback signal ( ). The natural sampler has an output to provide the naturally sampled digital signal ( ). In one embodiment, the natural sampler calculates a duty ratio ( ) using the feedback signal ( ) and uses interpolation to determine the naturally sampled digital signal ( ).

Circuitry for converting a sampled digital signal to a naturally sampled digital signal and method therefor

A device for implementing a method for receiving a complex baseband signal in analog form or in digital form, and providing a pulse modulated signal as a linear modulation of the complex baseband signal is disclosed. First, a complex modulated signal as a function of the complex baseband signal is generated. Second, a bandlimited exponential signal as a function of the complex modulated signal as computed with a truncated Taylor series for an exponential is generated, or a coefficient vector as a function of the complex modulated signal is generated. Finally, a pulse modulated signal as either a function of the bandlimited exponential signal or the coefficient vector is generated.

Modulated RF pulse waveform generation method and device

A modulated signal source for implementing A modulated signal method of a generating a modulated signal having a radio frequency based upon a linear mixing of signals is disclosed. An in-phase pulse signal modulator of the modulated signal source provides an in-phase pulse modulated signal in response to a reception of a baseband in-phase signal and an in-phase clock signal with the in-phase clock signal and the in-phase pulse modulated signal being synchronized. A quadrature pulse signal modulator of the modulated signal source provides a quadrature pulse modulated signal in response to a reception of a baseband quadrature signal and a quadrature clock signal with the quadrature clock signal and the quadrature pulse modulated signal being synchronized. A switch signal generator of the modulated signal source generates an in-phase switch signal and a quadrature switch signal in response to a reception of the in-phase clock signal, the in-phase pulse modulated signal, the quadrature clock signal, and the quadrature pulse modulated signal. The in-phase clock signal and the in-phase switch signal are synchronized, and the quadrature clock signal and the quadrature switch signal are synchronized. A radio frequency signal generator of the modulated signal source provides one or more modulated signals having a radio frequency in response to either a reception the in-phase switch signal and the quadrature phase signal, or a reception of a switch signal as a function of the in-phase switch signal and the quadrature phase signal.

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Kildeer, IL, United States of America

Patrick Lee Rakers