Altera Corporation

Patrick Guilloteau

Rafael Czernek Camarota

Arun Kumar Varadarajan Rajagopal

An integrated circuit (IC) with an Intellectual Property (IP) protection system is disclosed. The IC includes a memory array operable to store a key. The key is a sequence of binary bits. The IC also has an IP block operable to perform a function. The IP block is defined through the circuitry of the IC. The IP block is also operable to be activated with the key. The IC has an interconnection operable to couple the memory array to the IP block. The interconnection transfers the key from the memory array to the IP block. A method to configure and to operate the IC is also provided.

Logic block protection system

A programmable logic device for transferring JTAG scan data to a target device is disclosed. The programmable logic device includes a JTAG logic that communicates with a JTAG scan chain and interprets user-defined instructions received from the JTAG scan chain to generate control signals used by a target device interface and the target device interface, which transmits output data to a target device and receives input data from the target device in response to the control signals.

Growing community of inventors

Palaiseau, France

Patrick Guilloteau