International Business Machines Corporation

Lawrence Livermore National Security, LLC

Patrick Francis Caffrey

Kalman Zvi Meth

Adnan M Agbaria

Su-Hsuan Huang

William Joseph Ferrante

William Gole Tuel, Jr

Anton Prenneis

Demetrios K Michailaros

Larry Bert Brenner

Gerald J Fahr

Bret G Bidwell

Ronald P Corrado

Anthony Joseph Cozzolino

Ellick Chi-lick Law

Terry R Jones

William Wajda

Pythagoras C Watson

William Tuel

Jeffrey Fier

A method includes identifying a first distributed conversion and control assembly (DCCA) in a central electronics complex (CEC) of a computer system, the CEC containing the first DCCA and a second DCCA, each of the first DCCA and the second DCCA having a flexible service processor (FSP); determining that the computer system satisfies preconditions for concurrent replacement of the first DCCA; disabling control software for a thermal and power management device (TPMD) of the first DCCA; fencing off the first DCCA; depowering the first DCCA; receiving a new media access control (MAC) address of a replacement DCCA; reconfiguring an operating system of the CEC to recognize the new MAC address of the replacement DCCA; powering on the replacement DCCA; removing the fencing off of the first DCCA; and resetting an FSP of the replacement DCCA.

Concurrent replacement of distributed conversion and control assembly

In a parallel computing environment comprising a network of SMP nodes each having at least one processor, a parallel-aware co-scheduling method and system for improving the performance and scalability of a dedicated parallel job having synchronizing collective operations. The method and system uses a global co-scheduler and an operating system kernel dispatcher adapted to coordinate interfering system and daemon activities on a node and across nodes to promote intra-node and inter-node overlap of said interfering system and daemon activities as well as intra-node and inter-node overlap of said synchronizing collective operations. In this manner, the impact of random short-lived interruptions, such as timer-decrement processing and periodic daemon activity, on synchronizing collective operations is minimized on large processor-count SPMD bulk-synchronous programming styles.

Parallel-aware, dedicated job co-scheduling within/across symmetric multiprocessing nodes

A checkpoint of a parallel program is taken in order to provide a consistent state of the program in the event the program is to be restarted. Each process of the parallel program is responsible for taking its own checkpoint, however, the timing of when the checkpoint is to be taken by each process is the responsibility of a coordinating process. During the checkpointing, various data is written to a checkpoint file. This data includes, for instance, in-transit message data, a data section, file offsets, signal state, executable information, stack contents and register contents. The checkpoint file can be stored either in local or global storage. When it is stored in global storage, migration of the program is facilitated. When a parallel program is to be restarted, each process of the program initiates its own restart. The restart logic restores the process to the state at which the checkpoint was taken.

System of performing checkpoint/restart of a parallel program

Method of performing checkpoint/restart of a parallel program

Program products for performing checkpoint/restart of a parallel program

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Glasco, NY, United States of America

Patrick Francis Caffrey