Hewlett Packard Enterprise Development LP

Silicon Graphics International Corporation

Silicon Graphics, Incorporated

Graphics Properties Holdings, Inc.

Patrick Donlin

Michael Andrew Raymond

Andrew Warner

Eng Lim Goh

Samuel Edward Watters

An apparatus and method thermally manage a high performance computing system having a plurality of nodes with microprocessors. To that end, the apparatus and method monitor the temperature of at least one of a) the environment of the high performance computing system and b) at least a portion of the high performance computing system. In response, the apparatus and method control the processing speed of at least one of the microprocessors on at least one the plurality of nodes as a function or at least one of the monitored temperatures.

Managing power in a high performance computing system for resiliency and cooling

An apparatus and method thermally manage a high performance computing system having a plurality of nodes with microprocessors. To that end, the apparatus and method monitor the temperature of at least one of a) the environment of the high performance computing system and b) at least a portion of the high performance computing system. In response, the apparatus and method control the processing speed of at least one of the microprocessors on at least one of the plurality of nodes as a function of at least one of the monitored temperatures.

A method controls power consumption in a high performance computing system having a plurality of nodes by gathering information relating to the plurality of nodes in the high performance computing system, setting a power range to a given power range for the plurality of nodes as a function of the gathered information, and executing an application program on one or more of the nodes. The method also receives power commands from the application program relative to the one or more nodes, and responsively changes the power range to a new power range for the one or more nodes executing the application program. Thus, the one or more nodes execute the application program within the new power range.

Method and apparatus for managing nodal power in a high performance computer system

A system switches between non-secure and secure modes by making processes, applications, and data for the non-secure mode unavailable to the secure mode and vice versa. The process thread run queue is modified to include a state flag for each process that indicates whether the process is a secure or non-secure process. A process scheduler traverses the queue and only allocates time to processes that have a state flag that matches the current mode. Running processes are marked to be idled and are flagged as unrunnable, depending on the security mode, when the process reaches an intercept point. The scheduler is switched to allow only threads that have a flag that corresponding to the active security mode to be run.

Computer system with dual operating modes

A cpu-set type multiprocessor system allows a cpu of a cpu-set that has a hardware exception to disable itself and notify the system. The system assigns processes of the cpu-set that include the problem cpu to another cpu-set. The disabling of the problem cpu and transfer of the related processes to another cpu-set allows the system to failsoft so that other cpu-sets the multiprocessor system can continue to run and a recovery of the processes being run on the problem cpu-set occurs.

Failsoft system for multiple CPU system

A system that, at a process checkpoint, pauses the process to copy the system state for the process and then copies pages of the process in memory to disk storage while the process continues to run. When a write to a page by the process is to occur that requires a translation from a virtual address to a physical address the write is intercepted. The page that is being modified is duplicated and then the process is allowed to modify the page and continue. The duplicate page is then stored as part of the checkpoint copy.

Translation lookaside buffer checkpoint system

The present invention is a system that switches between non-secure and secure modes by making processes, applications and data for the non-active mode unavailable to the active mode. That is, non-secure processes, applications and data are not accessible when in the secure mode and visa versa. This is accomplished by creating dual hash tables where one table is used for secure processes and one for non-secure processes. A hash table pointer is changed to point to the table corresponding to the mode. The path-name look-up function that traverses the path name tree to obtain a device or file pointer is also restricted to allow traversal to only secure devices and file pointers when in the secure mode and only to non-secure devices and files in the non-secure mode. The process thread run queue is modified to include a state flag for each process that indicates whether the process is a secure or non-secure process. A process scheduler traverses the queue and only allocates time to processes that have a state flag that matches the current mode. Running processes are marked to be idled and are flagged as unrunnable, depending on the security mode, when the process reaches an intercept point. The switch operation validates the switch process and pauses the system for a period of time to allow all running processes to reach an intercept point and be marked as unrunnable. After all the processes are idled, the hash table pointer is changed, the look-up control is changed to allow traversal of the corresponding security mode branch of the file name path tree, and the scheduler is switched to allow only threads that have a flag that corresponds to the security mode to run. The switch process is then put to sleep and a master process, either secure or non-secure, depending on the mode, is then awakened.

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Deephaven, MN, United States of America

Patrick Donlin