Micron Technology Incorporated

Patrick Daniel White

Amitava Majumdar

Radhakrishna Kotti

Rajesh Kamana

Pavan Reddy K Aella

Lisa Diane Goslin

Darwin A Clampitt

Kevin Y Titus

Steven P Turini

A method used in forming memory circuitry comprises forming a stack where strings of memory cells will be formed and a select-gate region directly above the stack. The stack comprises vertically-alternating different-composition first tiers and second tiers having lower channel openings extending there-through. The select-gate region comprises upper channel openings extending there-through and that are individually directly above and extend to individual of the lower channel openings. Storage material of the strings of memory cells is formed simultaneously in the upper and lower channel openings. Then, insulative charge-passage material of the strings of memory cells is formed simultaneously in the upper and lower channel openings. Then, channel material is formed simultaneously in the upper and lower channel openings. The storage material is removed from the upper channel openings. After the removing, a select gate is formed in the select-gate region operatively aside the channel material in the select-gate region. Other embodiments, including structure, are disclosed.

Memory circuitry and methods used in forming memory circuitry

Methods, systems, and devices for leakage source detection are described. In some cases, a testing device may scan a first set of access lines of a memory die that have a first length and a second set of access lines of the memory die that have a second length different than the first length. The testing device may determine a first error rate associated with the first set of access lines and a second error rate associated with the second set of access lines. The testing device may categorize a performance of the memory die based on the first and second error rates. In some cases, the testing device may determine a third error rate associated with a type of error based on the first and second error rates and may categorize the performance of the memory die based on the third error rate.

Leakage source detection for memory with varying conductive path lengths

Novelty waterfowl call

Leakage source detection by scanning access lines

Growing community of inventors

Kuna, ID, United States of America

Patrick Daniel White