Freescale Semiconductor,inc.

Motorola Corporation

Patrick Clement

Nadim Khlat

Daniel B Schwartz

Alex Wayne Hietala

Sergio Pesenti

Laurent Loup

Maher Kayal

Abdessalem Turki

An integrated circuit comprises a delta-sigma modulator incorporating a delta-sigma modulation loop having an analog-to-digital converter in a forward path and a digital-to-analog converter in a feedback path such that the ADC is arranged to receive samples of an analog input signal. The ADC is operably coupled to auto-ranging logic arranged to shift a digital output signal from the ADC representative of the analog input signal to counteract an effect of an input variation of the analog input signal. In this manner, the application of auto-ranging logic with a self-recovery technique supports a reduction of the number of comparators required in a multi-bit delta-sigma ADC.

Electronic device and integrated circuit comprising a delta-sigma converter and method therefor

A multipath wideband communications receiver () having a plurality of RF signal paths () covering different but overlapping frequency bands and a plurality of baseband signal paths (), the paths being re-configurable for sharing of the first and second paths in different ways in order to facilitate processing of received signals in different modes. Also, a rake receiver () employs a sigma-delta modulator arrangement () and programmable delays to provide fine delay adjustment. The sigma-delta modulator () may use sigma-delta circuitry from a sigma-delta A/D converters in a baseband paths of the receiver (), that this may be achieved with no loss of functionality if in a particular reception configuration that sigma-delta A/D converter is not being utilized.

Multipath communications receiver

An arrangement () and method for sigma-delta analog-to-digital conversion by providing parallel translating sigma-delta analog-to-digital converters () and summing their outputs to produce a digital output signal having a bandwidth greater than that of the first or second translating sigma-delta analog-to-digital converters (). The parallel translating sigma-delta analog-to-digital converters () use switching sequences arranged to cancel third and fifth harmonics in the digital output signal. Orthogonality error in the switching sequences applied to the sigma-delta modulators is compensated by adjusting the phase of the signals applied to mixers ().

Sigma-delta analog-to-digital converter and method for reducing harmonics

An analog to digital converter comprising a plurality of comparators arranged to periodically sample an analog signal; a calculator arranged to predict a change in signal magnitude of the analog signal between one sample of the analog signal and another sample of the analog signal based upon predetermined criteria of the analog signal; and a controller for varying an operational parameter of one or more of the comparators based upon the predicted change in the signal magnitude of the analog signal.

Analog to digital converter

A Multi-Rate Analog-to-Digital Converter () is coupled to a single crystal oscillator () as a reference clock and has at least two separate channels arranged to sample and convert input data at two differing clock rates. Each channel derives a clock signal from the reference clock. Associated with each of the channels is a Sigma-Delta converter () comprising a modulator (), a filter () and a resampler (). The modulator () receives input data and provides a data signal to the filter (), which itself provides a filtered data signal to the associated data resampler. The data resampler resamples the data and provides a digital output signal. As there is sampling in the digital domain the advantages associated with signal processing, speed and low noise injection are obtained. Similarly as the output of the modulator () is in digital form, it can be manipulated and processed readily and with the existing software.

Multi-rate analog-to-digital converter

Apparatus for receiving and processing a wanted Radio Frequency signal comprises a radio frequency to intermediate frequency down-conversion stage for receiving the wanted radio frequency signal and out-putting a complex intermediate frequency signal; an analogue to digital converter for converting the complex intermediate frequency signal to a digital complex intermediate signal; an intermediate frequency to base-band down-conversion stage for receiving the digital complex intermediate frequency signal and out-putting a digital complex base-band signal; and a complex notch filter for receiving the digital complex base-band signal and out-putting a notch filtered digital complex base-band signal wherein the complex notch filter substantially filters out a small portion of the base-band signal centred about a first, non-zero, frequency while substantially passing a corresponding portion of the base-band signal centred about a second frequency having the same magnitude but opposite sign to the first frequency.

Apparatus for receiving and processing a radio frequency signal

Apparatus for receiving a carrier signal modulated by a wanted signal, the modulated carrier signal occupying one of a plurality of channels whose central frequencies are separated from one another by a fixed frequency referred to as the channel spacing, the apparatus including a local oscillator for generating first and second signals at a frequency which is not an integral multiple of half the channel spacing whereby when the received carrier signal is mixed with the first and second signals, a complex, digital Very Low Intermediate Frequency (VLIF) signal is generated in which the wanted signal is centred about a VLIF which is slightly larger than half the channel spacing.

Method and apparatus for receiving a signal

An analogue to digital or digital to analogue data converter for converting between a first digital signal at a first sampling rate f and a first analogue signal comprises a first conversion stage for converting an input signal into an intermediate digital signal at a second sampling rate f which is greater than the first over-sampling rate f ; a processing stage for performing digital signal processing on the intermediate digital signal to generate a processed intermediate digital signal and a second conversion stage for converting the processed intermediate digital signal into an output signal wherein the input and output signals comprise the first analogue signal and the first digital signal or vice versa depending on whether the data converter is performing analogue to digital or digital to analogue conversion.

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Bussigny, Switzerland

Patrick Clement