Apple Inc.

Patrick B Bennett

Chun-Yao Huang

Byung Duk Yang

Shih Chang Chang

Hopil Bae

Hao-Lin Chiu

Yingkan Lin

Chun-Ming Tang

Chaohao Wang

Shinya Ono

Baris Cagdaser

Hasan Akyol

Henry C Jen

Fenghua Zheng

Xiaofeng Wang

Kwang Soon Park

Ivan Knez

John T Wetherell

Cheuk Chi Lo

Steven M Scardato

Xuebei Yang

Chung-Lun Edwin Hsu

Alejandro X Levander

Xia Li

Paolo Sacchetto

Derek Keith Shaeffer

Sheng Zhang

Cheng-Ho Yu

Shih-Chang Chang

Mahdi Farrokh Baroughi

Wonjae Choi

ByoungSuk Kim

Kyung Wook Kim

Szu-Hsien Lee

Yi Huang

Tore Nauta

Shingo Hatanaka

Howard H Tang

Xinyu Zhu

Chuang Qian

Majid Gharghi

Rungrot Kitsomboonloha

Christopher L Boitnott

Michael Slootsky

Saif Choudhary

Lingtao Wang

Ali Tabatabaei

Ze Yuan

Szuhsien Lee

To C Tan

Peien Chang

Runjie Xu

Peng Xu

Display panels and methods of fabrication are described which a seal ring is formed within a build-up structure over a semiconductor substrate. The seal ring may include an outer perimeter wall and an inner setback wall spaced apart from the outer perimeter wall and directly underneath a contact ledge of the display panel.

Seal ring with inner setback wall for yield improvement

A pulse width modulation and amplitude modulation driving system for a display panel, including related circuits and methods of operation, are described. In an embodiment, a display panel includes a thin film transistor layer comprising a plurality of subpixel circuits. Each subpixel circuit may include a drive transistor, a comparator, and a switch. A plurality of light emitting diodes (LEDs), such as micro-LEDs, may be connected to the plurality of subpixel circuits. Each subpixel circuit can control an LED based on a current amplitude controlled by the drive transistor and a current pulse width controlled by the comparator and the switch. Other aspects are also described and claimed.

Pulse width modulation and amplitude modulation driving system for display panels

An electronic device may have a display. The display may include an array of pixels formed on a silicon substrate. Display driver circuitry may be formed in a display driver integrated circuit that outputs display data and other control signals for operating the display. An interposer structure may be included in the electronic device. The interposer structure may be attached to the silicon display substrate and may only partially overlap the silicon display substrate. The display driver integrated circuit may be attached to the interposer structure and provide signals to the display pixels through the interposer structure. In another possible arrangement, the display driver integrated circuit may bridge a gap between the silicon display substrate and the flexible printed circuit. The display driver integrated circuit only partially overlaps the silicon display substrate in this arrangement.

Electronic devices with displays and interposer structures

Systems and methods may reduce or eliminate image artifacts due to a defective pixel of an electronic display. An electronic display may include pixels that respectively include a self-emissive element, pixel drive circuitry that supplies a pixel drive current to drive the self-emissive element, and signal routing circuitry that reduces or eliminates a visual artifact due to a defective pixel among the pixels. The signal routing circuitry may do this by turning off the self-emissive element, supplying image data from the pixel drive circuitry to a first adjacent pixel, or receiving image data from other pixel drive circuitry from the first adjacent pixel or a second adjacent pixel.

Pixel screening and repair

Embodiments disclosed herein provide systems and methods for testing and repairing various aspects of an electronic display. The electronic display includes a reference array and an active array. The electronic display also includes test circuitry used to test individual or any combination of pixels of the electronic display. Switches may be disposed between the pixels and the test circuitry to be to repair the various components of the electronic display.

Circuitry for screening defective portion of display chip

An electronic device may include a display. The display includes display driver circuitry for driving data lines routed across the display. The electronic device may have a recessed device housing region, where at least some of the data lines are routed around the recessed region. The data lines being routed around the recessed region may be formed in at least two different metal routing layers. The electronic device may further include additional display driver circuitry for driving data lines from another peripheral housing edge to obviate the need to route around the recessed region. The data lines from the two display driver circuitries can be disconnected at random locations or can be interlaced to achieve spatial interleaving. The display driver circuitry may include demultiplexing circuitry having smaller switches coupled in parallel with larger demultiplexer routing switches to reduce voltage kick and charge injection.

Electronic devices with narrow border displays

A touch sensor panel comprising a first touch node electrode of a plurality of touch node electrodes, the first touch node electrode coupled to a first sense connection comprising a first set of traces, the first sense connection configured to have a first resistance per unit length that varies along a length of the first sense connection, and a second touch node electrode of the plurality of touch node electrodes, the second touch node electrode coupled to a second sense connection comprising a second set of traces, the second sense connection configured to have a second resistance per unit length that varies along a length of the second sense connection differently than the first resistance per unit length varies along the length of the first sense connection. An effective resistance of the first sense connection and the second sense connection are equal.

RC tuning of touch electrode connections on a touch sensor panel

A display may have an array of pixels arranged in rows and columns. Display driver circuitry may be provided along an edge of the display. Data lines that are associated with columns of the pixels may be used to distribute data from the display driver circuitry to the pixels. Gate lines in the display may each have a horizontal straight portion that extends along a respective row of the pixels and may each have one or more non-horizontal segments such as zigzag segments. The non-horizontal portion of each gate line may be connected to the horizontal straight portion of the gate line by a via. The non-horizontal portions may each have portions that are overlapped by portions of the data lines. Dummy gate line structures may be provided on the display that are not coupled to any of the pixels in the display.

Display having gate lines with zigzag extensions

The disclosure relates to systems and methods for reducing VCOM settling periods. A number of pixels is sub-divided into a plurality of regions. The pixels are configured to transmit light. A common voltage (VCOM) driving circuit is configured to drive a common electrode of the pixels. Moreover, each of a number of VCOM driving circuits includes a variable resistor configured to be driven to a resistance level based at least in part on which region of the plurality of regions includes an active pixel within the region. Furthermore, a resistance level is set and based at least in part on where the active pixel is located.

Multi-zoned variable VCOM control

A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

Gate line layout configuration

Growing community of inventors

Alameda, CA, United States of America

Patrick B Bennett