International Business Machines Corporation

Patrick Allen Buckland

Renato John Recio

Richard Louis Arndt

Gregory Michael Nordstrom

Harvey Gene Kiel

Jaya Srikrishnan

William Alan Thompson

Steven Mark Thurber

Leah Shalev

Giora Biran

Vadim Makhervaks

Jay Robert Herring

Jeffery David Haumont

Danny Marvin Neal

Adalberto Guillermo Yanes

Daniel Mark Dreps

Richard Loise Arndt

Richard Allen Kelley

Ian David Judd

Carl Alfred Bender

Jason Eric Moore

Kaveh Naderi

Abel Enrique Zuzuarregui

Nanju Na

John W Irwin

Jack E Reeder

Suzanne M Nolen

Daniel Frank Moertl

David Arlen Elko

Wen-Tzer Thomas Chen, Jr

Bruce Leroy Beukema

Stephen Peter Mroz

Paul Edward Movall

Neil Clair Berglund

David George Lund

Thomas James Osten

Norman Apperley

Gordon J Cockburn

Philip Michael Corcoran

Price Ward Oman

David Lee Dosch

Nancy Marie Uthke-Schmucki

William A Short

Roger G Cath

Melvin Kent Benedict

Carl Raymond Waters

A method, system and computer program product are provided for implementing sideband control structure for Peripheral Component Interconnect Express (PCIE) add-in cards, or cable cards, that utilize cables to connect to input/output (IO) expansion enclosures in a computer system. System firmware uniquely identifies a cable card present in a PCIE slot in a system unit. Enclosure management functions utilize sideband control paths integrated within at least cable providing sideband control signaling, and providing PCIE signaling lanes between the cable card and the IO enclosure.

Implementing sideband control structure for PCIE cable cards and IO expansion enclosures

Mechanisms, in a data processing system comprising an input/output subsystem implementing an industry standard optical bus, for handling a failure of an optical channel in an optical bus are provided. The mechanisms detect, by failure detection logic of the input/output (I/O) subsystem, failure of an optical channel of the optical bus. The mechanisms send, by a controller of the I/O subsystem, a control signal to channel routing logic of the I/O subsystem to control a routing of data signals between active bus lanes of the data processing system and optical channels of the optical bus in response to detecting the failure of the optical channel. The mechanisms control, by the channel routing logic, routing of data signals between the active bus lanes and the optical channels so as to remove the failed optical channel from further use and use a spare optical channel instead of the failed optical channel.

Dynamic optical channel sparing in an industry standard input/output subsystem

Method and apparatus for providing failover operation for a connection between a first PCIE bridge and a first input/output (IO) device are provided. A first set of bussed bits is exchanged between the first PCIE bridge and the first IO device over a first link using a first set of lanes of the first PCIE bridge. In response to detecting a failure in the first link, at a PCIE bridge end, the first set of lanes is swapped with a second set of lanes of the first PCIE bridge for exchanging a second set of bussed bits between the first PCIE bridge and the first IO device over a second link using the second set of lanes, the second link connecting a second PCIE bridge with a second IO device. In response to detecting the failure in the first link, at an IO device end, the first set of lanes is switched with the second set of lanes for exchanging the second set of bussed bits between the first PCIE bridge and the first IO device over the second link using the second set of lanes.

Cable redundancy and failover for multi-lane PCI express IO interconnections

Method and apparatus for providing failover operation for a connection between a first PCIE bridge and a first input/output (IO) device are provided. A first set of bussed bits is exchanged between the first PCIE bridge and the first IO device over a first link using a first set of lanes of the first PCIE bridge. In response to detecting the failure in the first link, the first set of bussed bits is exchanged between the first PCIE bridge and the first IO device using an unused portion of a second link connecting a second PCIE bridge and a second IO device.

A mechanism for temporarily stalling selected Direct Memory Access (DMA) operations in a physical input/output (I/O) adapter in order to permit migration of data between physical pages that are subject to access by the physical I/O adapter. When a request for a DMA to a physical page in system memory is received from an I/O adapter, a migration in progress (MIP) bit in a translation control entry (TCE) pointing to the physical page is examined, wherein the MIP bit indicates whether migration of the physical page referenced in the TCE to another location in system memory is currently in progress. If the MIP bit indicates a migration of the physical page is in progress, the DMA from the I/O adapter is temporarily stalled while other DMA operations from other I/O adapters to other physical pages in system memory are allowed to continue.

Stalling of DMA operations in order to do memory migration using a migration in progress bit in the translation control entry mechanism

A method, apparatus, and computer program product are disclosed in a shared processor data processing system for coordinating error reporting for and resetting of a physical I/O adapter that supports virtualization. The physical I/O adapter is virtualized by generating virtual I/O adapters that each represent a portion of the physical I/O adapter. Each one of the virtual I/O adapters is assigned to a different one of client logical partitions. A determination is made regarding whether the physical I/O adapter may have experienced an error. If the physical I/O adapter has experienced an error, all of the client logical partitions are notified about the error and a recovery of the physical I/O adapter is coordinated among all of the client logical partitions by waiting for each client logical partition to acknowledge the error notification before the physical I/O adapter is reset.

Method, apparatus, and computer program product for coordinating error reporting and reset utilizing an I/O adapter that supports virtualization

A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go through a trusted component, such as a Hypervisor. Specifically, the present invention is directed to a mechanism for sharing conventional PCI I/O adapters, PCI-X I/O Adapters, PCI-Express I/O Adapters, and, in general, any I/O adapter that uses a memory mapped I/O interface for communications.

Association of host translations that are associated to an access control level on a PCI bridge that supports virtualization

A method for emulating a dual-port I2C device includes monitoring a bus for I2C traffic. A system receives an I2C interrupt on the bus. The system determines whether the received I2C interrupt is one of either a hardware interrupt or a software interrupt. In the event the received I2C interrupt is a hardware interrupt, the system responds to the hardware interrupt, and accesses a flash memory for read/write operation based on the hardware interrupt. In the event the received I2C interrupt is a software interrupt, the system responds to the software interrupt, and accesses a flash memory for read/write operation based on the software interrupt.

System and method for dual-ported flash memory

A mechanism for modifying resources in a logically partitioned data processing system is provided. A request to modify resources associated with a virtual adapter allocated on a physical adapter is invoked. The resources associated with the virtual adapter comprise a subset of the physical adapter resources. The request to modify the physical adapter is conveyed to the physical adapter. Responsive to receipt of the request by the physical adapter, the physical adapter modifies the resources allocated to the virtual adapter.

System and method for modification of virtual adapter resources in a logically partitioned data processing system

Growing community of inventors

Austin, TX, United States of America

Patrick Allen Buckland