Fujitsu Corporation

Semi-Pac

Patricia R Boucher

David G Love

David A Horine

John T MacKay

Thomas E Molinaro

Wen-chou Vincent Wang

Larry Louis Moresco

Richard L Wheeler

Vivek Mansingh

A method of assembling thin film jumper connectors to a substrate as part of a process of manufacturing a multi-chip-module or other device having multiple components bonded to chip carrier or other substrate. An alignment plate is positioned on the chuck of a standard flip-chip bonding machine. The thin film jumper connectors are placed on the alignment plate in a face-up position after alignment to alignment marks on the plate using the machine's moveable platform and split-field viewer. The jumper connectors are held to the alignment plate by a force supplied by the vacuum system of the flip-chip bonder, with the force being transmitted to the jumpers through vacuum holes in the alignment plate. The plate's alignment marks are positioned so that when they are aligned with corresponding marks on the connectors, the bonding pads on the connectors are correctly aligned to the pads on the substrate. The substrate or chip carrier is then placed on the moveable platform and rotated to a face-down position. The substrate is moved into a coarse position over the thin film connectors, aligned with the split-field viewer, and then lowered into contact with the contacts of the connectors. The entire assembly, including the alignment plate is then placed in a reflow furnace or otherwise heated to cause the solder bumps on the thin film connector pads to make good electrical contact with the bonding pads on the substrate. Depending on the thermal relationships between the integrated circuit chips, the thin film connectors, and the substrate, the chips may be connected to the substrate either before or after the thin film jumper connectors are bonded to the substrate. If the chips are connected prior to the assembly of the thin film connectors, then a chip cavity is formed in the alignment plate to prevent contact between the chips and the bonding apparatus during the thin film connector bonding.

Method of assembling thin film jumper connectors to a substrate

Disclosed are methods and apparatuses for forming solder bumps on integrated circuit chips (and other similar circuitized units) and apparatuses. A screening stencil is laid over the surface of the substrate and solder paste material is deposited into the stencil's apertures with a screening blade. The stencil is placed in such a manner that each of its apertures is positioned over a substrate pad, upon which a solder bump is to be formed. Next, a flat pressure plate is laid over the exposed top surface of the stencil, which creates a fully enclosed, or 'captured', cell of solder paste within each stencil aperture. Then, with the stencil and plate remaining in place on top of the substrate, the substrate is heated to a temperature sufficient to reflow the solder paste material. After reflow, the substrate is cooled, and the pressure plate and stencil are thereafter removed, leaving solder bumps on the substrate. The use of the pressure plate ensures the proper formation of the solder bumps at high densities of solder bumps (i.e., high densities corresponding to small solder bump sizes and small pitch distances between solder bumps).

Captured-cell solder printing and reflow methods and apparatuses

Methods for forming solder bumps on integrated circuit chips (and other similar circuitized units). A screening stencil is laid over the surface of the substrate and solder paste material is deposited into the stencil's apertures with a screening blade. The stencil is placed in such a manner that each of its apertures is positioned over a substrate pad, upon which a solder bump is to be formed. Next, a flat pressure plate is laid over the exposed top surface of the stencil, which creates a fully enclosed or 'captured', cell of solder paste within each stencil aperture. Then, with the stencil and plate remaining in place on top of the substrate, the substrate is heated to a temperature sufficient to reflow the solder paste material. After reflow, the substrate is cooled, and the pressure plate and stencil are thereafter removed, leaving solder bumps on the substrate. The use of the pressure plate ensures the proper formation of the solder bumps at high densities of solder bumps (i.e., high densities corresponding to small solder bump sizes and small pitch distances between solder bumps).

Captured-cell solder printing and reflow methods

A compact, reliable, and efficient cooling system for semiconductor chips is disclosed. In one embodiment, a plurality of semiconductor chips have their active surfaces mounted to a major substrate which provides electrical connections among the chips, and a cooling channel is formed above the major substrate and each chip for conducting a cooling fluid over the back surface of the chips. To increase cooling efficiency, heat sink arrays are formed on the back surfaces of the chips, each array including a plurality of heat conducting elements attached to the back surface. The arrays may be readily and inexpensively constructed with photo-lithography or wire bonding techniques. To control the flow of cooling fluid around the chip edges and to prevent cavitation of the cooling fluid a cavitation and flow control plate disposed at the bottom surface of the cooling channel and formed around the edges of the chips is included. With the increased cooling efficiency, the height of each cooling channel may be substantially reduced to allow close stacking of interconnect substrates for three-dimensional packages and to shorten the vertical communication time between the interconnect substrates.

Growing community of inventors

Fremont, CA, United States of America

Patricia R Boucher