Lucent Technologies Inc.

Pasupathi Ananta Subrahmanyam

Kanwar Jit Singh

Guy Ashley Story, Jr

William M Schell

A device for creating and analyzing larger symbolic representations without the limitations imposed by available resources of previous devices is disclosed. More specifically, a debugger for debugging a symbolic representation of a program is disclosed. The debugger comprising means for inputting a set of characteristics, means for linking the set of characteristics to the symbolic representation, means for identifying a first portion of the symbolic representation mutually exclusive from the set of characteristics, and means for analyzing a second portion of the symbolic representation for the set of characteristics wherein the second portion being mutually exclusive from the first portion. A method of debugging programs using the debugger, in addition to the resultant debugged program, is also disclosed.

Method of and apparatus for efficiently debugging programs given limited

A method and system for information archiving on a network that is universally accessible to users. A stationary or mobile user may archive information on demand. A hook up into the network is established via a communication medium, and an initial protocol accesses the archiving service and communicates details of what is to be archived. The communication medium is then used to transmit and store the information in a specified fashion on the network, to be retrieved at a future time. The hook up may be initiated either by the user or by the network.

System for universal archival service where transfer is initiated by

A method for generating a simplified model of a complex binary transistor circuit. A set of Boolean functions are derived for the circuit and these functions are tested to determine if the circuit is stable and binary. All intermediate transient circuit configurations are eliminated so that only direct transitions between stable circuit configurations remain. If the circuit is also combinational, a logic circuit is generated. If the circuit is not combinational but if there is a clock input to the circuit that controls the values of the node (the circuit exhibits synchronous behavior) and all nodes in the circuit are well-defined (either combinational or level-sensitive), a logic circuit is generated. The logic circuit is processed to generate a further simplified logic circuit by merging different types of latches and other logic elements and removing duplicative logic elements.

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Freehold, NJ, United States of America

Pasupathi Ananta Subrahmanyam