Stmicroelectronics S.r.l.

Stmicroelectronics (rousset) Sas

Pasquale Butta′

Daniele Mangano

Michele Alessandro Carrano

Roland Van Der Tuijn

Sergio Abenda

A power-saving system includes a retention memory element for a retained peripheral that is set to a logic state during an operational-power mode and maintains the logic state during an enhanced power-saving mode. The power-saving system also includes a non-retention memory element for a non-retained peripheral that is set to a logic state during the operational-power mode of the power-saving system; and a controller that instructs the retention memory element to maintain its logic state while in an enhanced power-saving mode.

Methods and devices to conserve microcontroller power

A method for power management in an electronic circuit that comprises a processing system and an RF embedded circuit includes: generating a first regulated voltage with a power regulation module of the RF embedded circuit; generating a second regulated voltage from the first regulated voltage with a first linear regulator of the processing system; and controlling the power regulation module of the RF embedded circuit to operate according to a plurality of operation modes. The operation modes include: a first sleep mode in which a switched-mode power supply of the RF embedded circuit is off and a second linear regulator of the RF embedded circuit is off; a second sleep mode in which a switched-mode power supply is off and the second linear regulator is on; and a third sleep mode in which the switched-mode power supply is on and the second linear regulator is off.

Power management method, corresponding system and apparatus

An embodiment device comprises a processing circuit and IP circuitry coupled to a power supply line, wherein the IP circuitry has an IP circuitry supply threshold for IP circuitry operation. A supply monitor circuit is coupled to the power supply line to sense the voltage on the power supply line and to switch the processing circuit to a low-power mode as a result of a drop in the voltage on the power supply line. The supply monitor circuit comprises a threshold setting node and is configured to be deactivated as a result of the voltage on the power supply line dropping below a deactivation threshold level set at the threshold setting node. A threshold setting circuit is configured to apply to the threshold setting node of the supply monitor circuit the IP circuitry supply threshold as a result of the processing circuit being in the low-power mode.

Growing community of inventors

Messina, Italy

Pasquale Butta′