U.S. Philips Corporation

Nxp B.v.

Koninklijke Philips Corporation N.v.

St-Ericsson Sa

Pascal Philippe

Marc Sworowski

Brian John Minnis

Patrice Gamand

Fabrice Jovenin

Adrianus Alphonsus Jozef Buijsman

David D R Chevrie

Nicolas Jonathan Pulsford

Fattah Haddad

Mihai Murgulescu

Adrianus Bernardus Smolders

A wireless transmitter () comprises a signal generator () for generating a signal, an amplifier () for amplifying the signal, and a phase shifting circuit () coupled between the signal generator () and the amplifier () and arranged to shift the phase of the signal to cancel remodulation of the signal generator () by the amplified signal.

Cancellation of oscillator remodulation

A radiofrequency transmitting device delivers output signals having a chosen radiofrequency from input data split up into complementary phase data and amplitude data. This device includes a radiofrequency reference oscillator for outputting a reference signal having a fixed radiofrequency reference, and a digital phase modulator for synthesizing the chosen radiofrequency from the fixed radiofrequency reference and for phase modulating the reference signal with the phase data, in order to produce an output signal having the chosen radiofrequency.

Digital polar radio frequency transmitting device with a radiofrequency reference oscillator and an integrated circuit comprising such device

Method of manufacturing a MEMS device integrated in a silicon substrate. In parallel to the manufacturing of the MEMS device passive components as trench capacitors with a high capacitance density can be processed. The method is especially suited for MEMS resonators with resonance frequencies in the range of 10 MHz.

Integrated single-crystal MEMS device

The invention relates to a MEMS resonator having at least one mode shape comprising: a substrate () having a surface (), and a resonator structure (), wherein the resonator structure () is part of the substrate (), characterized in that the resonator structure () is defined by a first closed trench () and a second closed trench (), the first trench () being located inside the second trench () so as to form a tube structure () inside the substrate (), and the resonator structure () being released from the substrate () only in directions parallel to the surface (). The invention further relates to a method of manufacturing such a MEMS resonator.

MEMS resonator having at least one resonator mode shape

The jitter reduction circuit to reduce phase noise in a pulse train, comprises: &#x2014;a resettable integrator () to integrate the pulse train, &#x2014;a comparator () to compare the integrated pulse train with a reference level and to generate a modified pulse train with reduced phase noise, &#x2014;a crossing time interval detector () configured to determine a discrete time interval during which the integrated pulse train crosses the reference level and to reset the integrator between two discrete time intervals determined consecutively.

Jitter reduction circuit and frequency synthesizer

The electronic device () of the invention comprises a semiconductor device () and a low-pass filter (), which are present in a stacked configuration, and which together include a phase locked loop. The low-pass filter is preferably embodied by vertical trench capacitors, and preferably comprises a drift compensation part. The device () can be suitably provided in an open loop architecture. In a preferred embodiment, the low-pass filter comprises a large capacitor (C) and a small capacitor (C) connected in parallel, the large capacitor (C) being connected in series with a resistor (R).

Low pass filter and electronic device

The invention relates to a receiver of signals [S] received from a wireless network, said receiver working at a so-called reference oscillation frequency controlled by a so-called reference value [Vref]. Said receiver includes demodulation means [DEMO] for demodulating the received signal [S], means [EST] of estimating a mean value [MV] of the demodulated signal [SD], means [COR] of correcting the mean value [MV] of the demodulated signal [SD] to the reference value [Vref], decision means [DEC] for determining the binary values adopted by the received signal [S]. According to the invention, the estimation means [EST] include first means [ESTA] of fast extraction of a first mean value [MVA] of the demodulated signal [SD] used in decision means [DEC] during a first time period and second means [ESTB] of slow extraction of a second mean value [MVB] of the demodulated signal [SD] used in correction means [COR] and, during a second time period, in decision means [DEC].

Automatic frequency control receiver

A transmitter has a phase modulator and a phase locked loop that has a relatively high powered voltage controlled oscillator. The phase locked loop has a phase sensitive detector for comparing a phase comparison frequency derived from the voltage controlled oscillator output with a phase modulated intermediate frequency carrier derived from the phase modulator. The phase modulator has a reference frequency source, means for deriving four quadrature phase components of the reference frequency produced by the source and phase selection means controlled by complex modulation means for deriving the phase modulated intermediate frequency carrier by random interpolation between the four quadrature components.

Transmitter with a phase modulator and a phase locked loop

The invention relates to an oscillator OSC intended to provide an output signal having a frequency which is variable as a function of a tuning voltage Vtun. The oscillator OSC includes a passive part having two series-arranged variable capacitances Cs, biased by the tuning voltage Vtun, and connected to a power supply VCC via two inductances Lext, and an active part having a first transistor T1 and a second transistor T2 whose collectors are connected to the output terminals C1 and C2 of the passive part, the base of one transistor being connected to the collector of the other transistor via a coupling capacitor Cfb. According to the invention, the passive part includes two high-pass filters, each being inserted between one of the output terminals S1 or S2 and one of the variable capacitances Cs, which allows a reduction of the active part's sensitivity to low-frequency noise.

Integrated oscillator and radio telephone using such an oscillator

An amplifier including a first output transistor (T2a) and a second output transistor (T3a) having the same polarity and arranged in push-pull configuration, and an input transistor (T1a) whose collector is coupled to the base of the first output transistor (T2a). The amplifier also includes a third output transistor (T2b) and a fourth output transistor (T3b) which are also arranged in push-pull configuration, and a supplementary input transistor (T11b) whose emitter is coupled to the emitter of the input transistor (T1a) and whose collector is coupled to the base of the second output transistor (T3a) and to the base of the third output transistor (T2b), the base of the fourth output transistor (T3b) being coupled to the collector of the input transistor (T1a).

Amplifier having a reduced distortion rate

An oscillator comprising an amplifier device, a capacitive divider bridge whose terminals are connected between a control electrode of the device and a reference voltage, the intermediate junction point of this bridge being connected to a principal electrode of the device, and also comprising, in parallel between the control electrode and the reference voltage, a tuning circuit having parallel branches: a first branch with an inductance in series with a variable capacitance, and, a second branch equivalent to a variable capacitance. The tuning circuit has a third branch constituted by a capacitance in parallel with the first branch, while a series inductance whose value is smaller than that of the tuning inductance is arranged between the junction point connecting the two latter branches and the junction point connecting the control electrode of the device to the second branch and to the divider bridge.

Voltage-controlled frequency oscillator

A semiconductor device comprises a two-stage differential amplifier, the amplifier comprising a first differential transistor pair whose transistors are coupled by their source electrodes and each receive an input signal, and a second differential transistor pair whose transistors are coupled by their source electrodes, each of these transistors receive the output of one of the branches of the first differential pair, and each supply an output. In the amplifier each branch of the second differential pair is arranged in series with a branch of the first differential pair so as to form two sub-circuits each including a transistor of the first pair with its load and a transistor of the second pair with its load in a manner such that the two transistors of each sub-circuit share the same current.

Semiconductor device comprising a two-stage differential amplifier

Phase shifter to which are applied two signals in a phase opposition (v, -v) is constituted by a first series circuit of a resistor and a capacitor (R.sub.1, C.sub.1), and a second series circuit of a resistor and a capacitor (R.sub.2, C.sub.2). So that neither the relative amplitudes nor the relative phases of all the signals used at the outputs (5, 6, 7, 8) are degraded by the impedance of the stages that follow, the phase shifter includes a first network of a resistor and a capacitor connected in parallel (C.sub.3, R.sub.3), and a second network of a resistor and a capacitor connected in parallel (C.sub.4, R.sub.4). Both the four resistors and the four capacitors of the phase shifter are each substantially equal in value.

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Caen, France

Pascal Philippe