Texas Instruments Corporation

Partha Sarathi Basu

Dimitar Trifonov

Tony Ray Larson

Chao-Hsiuan Tsay

Ankit Khanna

Chase Mackenzie Puglisi

A current sense amplifier includes a first amplifier stage, a second amplifier stage, a switch, and a common-mode transient detector. The first amplifier stage has a first amplifier output, a second amplifier output, a first amplifier input, and a second amplifier input. The second amplifier stage has a third amplifier input coupled to the first amplifier output, and a fourth amplifier input coupled to the second amplifier output. The switch has a switch control input, a first switch terminal coupled to the third amplifier input, and a second switch terminal coupled to the fourth amplifier input. The common-mode transient detector circuit has a detector output, a first detector input and a second detector input. The detector output is coupled to the switch control input. The first detector input is coupled to the first amplifier input. The second detector input is coupled to the second amplifier input.

Current sense amplifier

A dual integrator system comprises two integrators, an output stage, and a switching network. The first and second integrators receive a differential Hall sensor signal and a reference voltage. The first integrator outputs a first integrator signal based on the differential Hall sensor and the reference voltage. The second integrator outputs a second integrator signal based on the differential Hall sensor signal and the reference voltage. The first integrator comprises a first offset cancellation feedback loop, and the second integrator comprises a second offset cancellation feedback loop. The switching network is coupled to the first and second integrators and to the output stage, and alternates which of the first and second integrators is coupled to the output stage. In some embodiments, the first and second integrators each perform a reset operation, a sampling operation, an integration operation, a differential to single-ended conversion operation, and a holding operation.

Switched capacitor integrator circuit with reference, offset cancellation and differential to single-ended conversion

A system comprises a calibration current generator, which provides a calibration current to a first and a second Hall channel, and a bias current generator, which determines a difference between a calibration signal from the Hall channels and a threshold and adjusts a biasing current for the Hall channels based on the difference. In some embodiments, the bias current generator comprises a subtractor coupled to an ADC and a controller coupled between the ADC and a DAC. The subtractor obtains a first and a second signal from the first and second Hall channels, respectively, and subtracts the first from the second to obtain the calibration signal. The controller determines the difference between a sampled signal from the ADC and the threshold and an adjustment to the biasing current based on the difference. The DAC adjusts the biasing current based on a control signal from the controller indicating the adjustment.

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Tucson, AZ, United States of America

Partha Sarathi Basu