International Business Machines Corporation

Parth Sanjaybhai Shah

Ranjal Gautham Shenoy

Alper Buyuktosunoglu

Pradip Bose

Vaidyanathan Srinivasan

Augusto Javier Vega

Aspects of the invention include distributed systems and methods that provide data aggregation in a fast, lock-free manner. A non-limiting example computer-implemented method includes producing new data at a first producer node of a distributed system having two or more producer nodes, a consumer node, and a global view. The global view includes a hierarchical binary tree of cell addresses. Each producer node includes a local view of the global view. Responsive to producing the new data, the local view of the first producer node is updated with the new data and a local timestamp and, if the local timestamp is greater than a global timestamp, a pointer in a cell address of the global view is flipped to point to the new data.

Lock-free data aggregation on distributed systems

A method, computer program product, and/or system associates a number of tokens with a plurality of frequency domains (for example, cores) of a central processing unit (CPU) computer chip. The number of tokens allotted to the CPU is based on the CPU power budget. Cores are organized as a ring topology. A token pool traverses the ring, picks up excess tokens from cores having excess tokens, and gives the tokens to cores that need additional tokens. Tokens acquired by a core allows the core to increase operating frequency by an increment represented by the tokens. Consequently, power usage is weighted toward heavily loaded cores and away from lightly loaded cores. Overall power usage of the CPU remains within a power budget. The method budgets power optimally to sustain turbo frequencies for longer durations by not allowing control units to increase frequency in absence of any useful high frequency benefiting workload.

Governing power budget with token passing

Embodiments relate to a system, program product, and method for leveraging thermal profiles of processing tasks to dynamically schedule execution of the processing tasks. Thermal profiles of the processing tasks are generated, where the thermal profiles include core hardware and core processing measurements and predictions of thermal performance based on the measurements. The execution of the processing tasks are scheduled in processing devices to mitigate a potential for reducing a margin to a hardware thermal limit.

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Bengaluru, India

Parth Sanjaybhai Shah