Synopsys, Inc.

Parivesh Choudhary

Ganapathy Parthasarathy

Saurav Nanda

Pawan Patil

Arun Venkatachar

Embodiments relate to a system for translating design specifications of an electronic circuit. In one embodiment, the design specification is parsed to identify one or more sentences. From the one or more identified sentences, the system extracts semantic concepts. Additionally, for each sentence of the one or more identified sentences, the system determines whether the sentence is translatable. If a target sentence is translatable, the system generates a parse tree for the target sentence, and generates a probabilistic shift-reduce schedule for the generated parse tree. Using the generated probabilistic shift-reduce schedule and optionally the generated parse tree, the system generates code for verifying the condition specified in the target sentence. In some embodiments, to generate the code, the system parses the target sentence using the generated probabilistic shift-reduce schedule.

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Sunnyvale, CA, United States of America

Parivesh Choudhary