Sony Semiconductor Solutions Corporation

Parit Kanjanavirojkul

Daisuke Nakagawa

Kazutoshi Tomita

Katsuyuki Yonezawa

Masako Hasegawa

The technology of the present disclosure improves an image quality in a solid-state imaging element that amplifies a voltage for every column. In the solid-state imaging element, an input transistor outputs, from a drain, an output voltage corresponding to a voltage between a source and a gate to which an input voltage is input. A base side current source transistor supplies a predetermined current from the drain of the input transistor to a base node determined in advance. A feedback circuit feeds back a part of the predetermined current to the gate of the input transistor. The clamp circuit limits the output voltage to a value higher than a lower limit voltage determined in advance.

Solid-state imaging element and imaging apparatus

A photodetection device of the present disclosure includes: multiple AD converters provided for respective pixel columns of multiple pixels and performing AD conversion on a pixel signal based on a second output signal, and including a comparison circuit, which includes a first-stage amplifier circuit outputting a first output signal corresponding to a comparison operation based on the pixel signal and a reference signal, and a second-stage amplifier circuit coupled to the first-stage amplifier circuit and outputting the second output signal corresponding to the first output signal; multiple clamp circuits provided for the comparison circuit of each of the AD converters, and each including a switch controlled on and off based on a clamp control signal, in which the clamp circuits selectively clamp a voltage of the second output signal by turning on the switch; and a control signal generator generating the clamp control signal for each of the clamp circuits.

Growing community of inventors

Kanagawa, Japan

Parit Kanjanavirojkul