Oracle International Corporation

Pangjie Xu

Hoyeol Cho

Ioannis Orginos

Kanghoon Jeon

Jason T Su

Systems, methods, and other embodiments associated with using a local voltage regulator embedded within a memory sub-array are described. In one embodiment, a memory device includes a memory sub-array including a set of memory cells and a local voltage regulator. The local voltage regulator is configured to generate a local voltage for powering the memory sub-array. The memory device includes switch logic connected to the memory sub-array and configured to select between the local voltage and a source voltage to power the memory sub-array. The source voltage is provided to the memory device by a host device.

Memory power selection using local voltage regulators

Embodiments provide centralized redundancy block repair for memory circuits. Certain embodiments are implemented in context of high-performance memory, such as last-level cache design, where the primary memory bank often uses high-density memory cells ('bitcells') and supports long self-bitline structures to increase compactness. In such contexts, it can be difficult to finish read operations within a single cycle, even when the entire cache is divided into small bank pieces. Bank-interleaved structure in clusters can be implemented to allow access to different memory banks in consecutive cycles, thereby achieving overall single circle throughput (i.e., the latency can be masked by the interleaving). Accordingly, some embodiments of the centralized block repair can support bank interleaved access, for example, with a strict single-cycle throughput. Some embodiments can also support other features, such as row repair and/or column repair.

Centralized memory repair block

Systems, methods, and other embodiments associated with improving a static noise margin of memory cells by using charge sharing to under-drive a wordline are described. In one embodiment, a system includes power logic to, in response to a memory request, connect a voltage source with a virtual power network to store an electric charge within the virtual power network based on a voltage from the voltage source. The virtual power network includes a network of interconnects that electrically connect a plurality of driver interconnects. The system includes wordline logic to under-drive a requested wordline of a plurality of wordlines by connecting the requested wordline with the virtual power network to share the electric charge stored in the virtual power network with the requested wordline. The wordline logic under-drives a voltage of the requested wordline to be lower than a source voltage provided by the voltage source.

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Santa Clara, CA, United States of America

Pangjie Xu