Texas Instruments Corporation

Alliance Semiconductor Corporation

Pamela Kumar

Mohit Sharma

Damodar Reddy Thummalapally

Tavare Dhanaraj B

Cyril John Chemparathy

A high speed parser containing a content addressable memory (CAM) providing select values to multiplexers. The CAM is programmed to implement search rules which examine input data for specific semantics according to a protocol, and outputs the specific bit positions at which the corresponding desired data units are present. The outputs are provided to multiplexers to cause the desired data units to be selected on the corresponding output paths of the multiplexors.

High speed parser

A method is provided for prioritizing the entries in a database, where each entry is composed of multiple dimensions. Prioritization is required when there are multiple matches in the database. The number of matches can be the same as the number of entries in the database. To prioritize such a huge number of entries in a minimum number of clock cycles, a distributed prioritizer is implemented by partitioning stored binary data into half nibbles comprising of two bits of data each. Each half nibble is encoded into an expanded format allotting priority value to the stored encoded half nibbles. The stored encoded half nibbles are compared across a word array to determine an exact match.

Method for the prioritization of database entries

A multiplexer containing multiple cells sharing a common output line. The cells select one of multiple input bits. The output line is first charged to a first logical value (e.g., 0), and one of the cells drives the output line to a second logical value (1) if the corresponding input bit does not equal the first logical value. The remaining cells may not affect the output line. Due to such an implementation, the number of transistors may be reduced.

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Pamela Kumar