Motorola Corporation

Freescale Semiconductor,inc.

Adx Research, Inc.

Future Wei Technologies, Inc.

University of Illinois

Tsi Power Corp.

Fairchild Semiconductor Corporation

Huawei Technologies Co., Limited

Pallab Midya

William J Roeckner

Poojan Wagh

Patrick Lee Rakers

John K Grosspietsch

Lawrence Edwin Connell

Matthew Richard Miller

Ronald Gene Myers

Dale Robert Anderson

Philip T Krein

Hong Jiang

Robert S Schneider

Anthony R Schooler

Peter Nystrom

Michael Washington

Steven F Gillig

Gregory J Buchwald

Wael Al-Qaq

George Francis Opas

Andrew Merritt Khan

Daniel A Mavencamp

Kenneth R Haddad

Siamak Abedinpour

Robert Michael Jackson

Bradley C Stewart

William John Rinderknecht

Brian M Mancini

Jin Huang

Jing Fang

Joseph M Ingino

Robert Louis Palandech

Robert J Turnbull

John Ribe

Cesar Pascual

Steven W Bergstedt

Rakers L Patrick

Xin Geng

Brian D Lindemann

Theresa Paulo

Uma Ekambaram Iyer

Adip Kumar Dutta

Karen K Hicks

Wael Ai-Qaq

A switching amplifier system with a power supply, a pulse modulator configured to modulate an input signal into a pulse width modulation signal, a switching stage configured to generate an amplified output signal, and an error feedback signal configured to correct errors in the amplified output signal, where the input signal is comprised of at least one of an analog signal and a digital signal. A method of signal amplification comprising generating, by a pulse width modulator, a pulse width modulation signal, combining, by a switching stage, the input signal and the pulse width modulation signal to form an amplified output signal, and generating, by the switching stage, an error feedback signal, where the error feedback signal is configured to correct errors in the amplified output signal, and where the input signal is comprised of at least one of an analog signal and a digital signal.

Switching amplifier system with feedback

A liquid gauge is disclosed. The liquid gauge includes a plurality of holes configured to receive a plurality of liquid droplets of a first size. The liquid gauge also includes a plurality of curved structures configured to form an aggregated liquid droplet of a second size using the plurality liquid droplets of the first size. The liquid gauge further includes a plurality of counting electrodes configured to generate a corresponding electrical signal. The liquid gauge further includes a processing unit configured to count the aggregated liquid droplet of the second size received by each of the counting electrode and also configured to compute a total amount of liquid fall based on the aggregated liquid droplet of the second size.

Liquid gauge and a method for operating the same

An electronic writing device is provided. The electronic writing device includes a tip configured to enable writing on a physical surface. The electronic writing device also includes an electronic chip housed in a body of the electronic writing device and coupled to the tip. The electronic chip includes an accelerometer configured to record an acceleration data of the electronic writing device when writing on the physical surface. The electronic chip also includes a gyrometer configured to generate a rotation data corresponding to rotation of the electronic writing device. The electronic writing device further includes a communication module operatively coupled to the electronic chip. The communication module is configured to send data received from the electronic chip to an external processing medium.

Electronic writing device and a method for operating the same

A pulse quadrature modulator generates both alpha and beta binary signals, each one serial bit switched at an RF carrier frequency at a fraction of a high speed quantization clock. The alpha and beta binary signals each have respective alpha and beta pulse edges nominally occurring at two times the RF carrier frequency. The alpha and beta pulse edges alternate respectively. The alpha and beta pulse edges are each synchronized to the high speed quantization clock switched based on the baseband I and Q signal inputs. First and second switches gate a power signal using a respective of the alpha or beta binary signals to respectively produce first and second power outputs. The first and second switches differentially drive an RF load such as an antenna across the first and second power outputs having pulse edges at nominally at an integer multiple of four times the RF carrier frequency.

Pulse quadrature modulator and method

A method for clock spur artifact correction includes obtaining a plurality of switching stage input signals generated in accordance with an input signal level of an external amplifier, and adjusting the plurality of switching stage input signals such that a clock spur harmonic artifact is reduced. The clock spur harmonic artifact includes a first clock spur harmonic artifact generated in a plurality of external signal paths including external switching stages, and the adjusting the plurality of switching stage input signals includes one of: adjusting a duty ratio of one of the plurality of switching stage input signals in accordance with a gain mismatch between two of the external signal paths; and injecting a first Continuous Wave (CW) signal into the plurality of switching stage input signals in accordance with a previous amplitude of the first clock spur harmonic artifact.

System and method for clock spur artifact correction

An AC power converter converts power from an AC power source to an AC load. A DC power holding source is coupled to an input half-bridge switch, a common half-bridge switch and an output half-bridge switch. A controller is coupled to at least two of the input half-bridge switch, the common half-bridge switch, and an output half-bridge switch. The controller switches the input half bridge at the first switching frequency in boost mode and at the line frequency in buck mode. The controller also switches the output half bridge switch at the first switching frequency in buck mode and at the line frequency in boost mode. Input and output low pass filters can eliminate switching frequency energy from entering the AC source and load. The converter maintains a DC power holding source voltage slightly above peak AC input voltage and significantly less than twice the peak AC input voltage.

Power converter for AC mains

An AC power converter converts power from an AC power source to an AC load. A DC power holding source is coupled to an input half-bridge switch, a common half-bridge switch and an output half-bridge switch. A controller is coupled to the input half-bridge switch, the common half-bridge switch, and an output half-bridge switch to generate at least two control signals at a common switching frequency, wherein the controller generates the at least two control signals with a phase difference there between chosen to cause a ripple frequency in both the input low pass filter and the output low pass filter to be double the common switching frequency. An input low pass filter can eliminate switching frequency energy from entering the AC power source. An output low pass filter can eliminate switching frequency energy from entering the AC load.

Multibridge power converter for AC mains

A tracking power converter for a radio frequency power amplifier includes a boost converter circuit, a switching network circuit, a filter circuit, and a controller circuit. The boost converter circuit provides a boosted voltage in response to a battery voltage. The switching network provides a switching signal in response to the boosted voltage, a first switch enable signal, a second switch enable signal, and a third switch enable signal. The filter circuit provides a power converter output voltage in response to the switching signal. The controller circuit provides the first switch enable signal, the second switch enable signal, and the third switch enable signal in response to a predetermined reference voltage, the switching voltage, the boosted voltage, and the battery voltage.

Envelope tracking power converter

An apparatus for providing envelope tracking (ET), comprising: a power amplifier (PA) load variation pre-distortion, and an open loop ET modulator operatively coupled to the PA load variation pre-distortion, wherein the PA load variation pre-distortion is configured to determine a load variation at a PA supply voltage path based on an input signal received by a PA, and generate a pre-distortion compensation signal using the load variation, and wherein the open loop ET modulator is configured to generate a PA supply voltage on the PA supply voltage path using the pre-distortion compensation signal.

Nonlinear load pre-distortion for open loop envelope tracking

A PCM signal is converted to a PWM signal using predistortion to alleviate harmonics. A PCM predistorted signal is converted to the PWM and amplified. A third harmonic nonlinear function receives the PCM signal and produces a third harmonic of the PCM signal. A third harmonic difference function takes one sixth of the third harmonic and produces a third harmonic PCM compensation signal. The PCM signal and the third harmonic PCM compensation signal are summed to produce a PCM predistorted signal for a full-bridge amplifier. A second harmonic nonlinear function produces a second harmonic of the PCM signal. A second harmonic function takes one fourth of the second harmonic to produce a second harmonic PCM compensation signal. The PCM signal, the third harmonic PCM compensation signal, and the second harmonic PCM compensation signal are summed to produce the PCM predistorted signal for a half-bridge amplifier.

PCM to digital PWM using predistortion

A system according to one embodiment includes a digital data modulator configured to generate encoded symbols; an envelope detector configured to receive the encoded symbols and to estimate transmission power information associated with the encoded symbols; a peak detector configured to receive the transmission power information, detect a peak transmission power from two or more sequential data points of the received transmission power information, and to generate a power regulation signal representative of the detected peak transmission power; and a digital to analog converter (DAC) configured to receive the power regulation signal and to provide a reference voltage to a power supply associated with an RF amplifier.

Envelope extraction with reduced bandwidth for power modulation

A DC power stage provides a power output that tracks a PCM signal input. A mapping unit generates an integer number of N digital PWM signals each switched at a same switching frequency by switching states of the PWM signals one at a time based on a level of the PCM signal input. An imbalance correction unit adjusts a duty ratio of the PWM signals relative to one another based on differentially accumulating errors among the PWM signals to prevent divergence of PWM signals. N corresponding switches therefrom switch power from a DC power source. N inductances in parallel produce a combined signal that is low pass filtered to provide the power output. Switching is between only those state combinations where the switching frequency is cancelled in the combined signal. The switching frequency is a sampling frequency of the PCM signal input divided by a product of 2 times N.

Multiple switch power stage control tracking PCM signal input

A transceiver mitigates signal leakage into a receive path from a transmit path. A subtraction circuit determines a difference between a receive signal and a compensation signal to produce a compensated receive signal prior to demodulation by a demodulator. An equalizer both amplitude adjusts and phase adjusts orthogonal baseband transmit signals based on the difference from the subtraction circuit to produce the compensation signal. A digital tuning circuit determines at least one amplitude adjust coefficient to be used by the equalizer. The equalizer can have a polarity switch or a variable attenuator or a variable delay.

Transmitter signal injection compensation

A switching power converter converts an input DC voltage to an output DC voltage using a switch to selectively connect an input DC voltage energy source. A switching controller controls the switch. A pulse width modulation centering signal is generated by a spread spectrum clock signal generator. An error amplifier of the switching controller generates an analog error signal based on a switching voltage measured after the switching of the switching power converter, the output voltage of the switching power converter, the pulse width modulation centering signal and a reference. A pulse width modulated signal generator generates the pulse width modulation signal to control the switch of the switching power converter based on the pulse width modulation centering signal and the analog error signal.

DC to DC switching power converter controller using spread spectrum PWM

A switching audio amplifier circuit drives a switching audio amplifier stage using a digital PWM signal from an audio source. A PWM duty ratio modifier modifies an edge timing of the digital PWM signal to produce a modified digital PWM signal. A mode switch switches between the digital PWM signal and the modified digital PWM signal in a way that masks audible noise such as clicks and pops at power-up and power-down of the switching audio amplifier. An integrating error amplifier compares a difference between the digital PWM signal and an amplified PWM signal and integrates the difference to control the edge timing modified by the PWM duty ratio modifier. A mode controller can apply an offset signal to the integrating error amplifier and can control the switching of the mode switch.

Quiet power up and power down of closed loop digital PWM modulators

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Palatine, IL, United States of America

Pallab Midya